From 8756581da6e89b258ce3da6f70e077e6446e3fdf Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Thu, 6 Jun 2024 15:39:51 +0200 Subject: [PATCH 1/8] add support for multi asic in multi voltage domain --- config-401.cvs | 2 ++ config.cvs.example | 2 ++ main/global_state.h | 2 ++ main/http_server/http_server.c | 1 - main/main.c | 8 +++++++- main/nvs_config.h | 2 ++ main/vcore.c | 4 ++-- readme.md | 8 +++++++- 8 files changed, 24 insertions(+), 5 deletions(-) diff --git a/config-401.cvs b/config-401.cvs index 34527d5a..b179e1f6 100644 --- a/config-401.cvs +++ b/config-401.cvs @@ -10,6 +10,8 @@ stratumpass,data,string,x asicfrequency,data,u16,490 asicvoltage,data,u16,1166 asicmodel,data,string,BM1368 +asiccount,data,u16,1 +voltagedomain,data,u16,1 devicemodel,data,string,supra boardversion,data,string,401 flipscreen,data,u16,1 diff --git a/config.cvs.example b/config.cvs.example index 6afb4714..ffb2d6c0 100644 --- a/config.cvs.example +++ b/config.cvs.example @@ -10,6 +10,8 @@ stratumpass,data,string,x asicfrequency,data,u16,485 asicvoltage,data,u16,1200 asicmodel,data,string,BM1366 +asiccount,data,u16,1 +voltagedomain,data,u16,1 devicemodel,data,string,ultra boardversion,data,string,204 flipscreen,data,u16,1 diff --git a/main/global_state.h b/main/global_state.h index c9a94a13..fd2d5670 100644 --- a/main/global_state.h +++ b/main/global_state.h @@ -43,6 +43,8 @@ typedef struct char * device_model_str; AsicModel asic_model; char * asic_model_str; + uint16_t asic_count; + uint16_t voltage_domain; AsicFunctions ASIC_functions; double asic_job_frequency_ms; uint32_t initial_ASIC_difficulty; diff --git a/main/http_server/http_server.c b/main/http_server/http_server.c index 407f612c..57e215d8 100644 --- a/main/http_server/http_server.c +++ b/main/http_server/http_server.c @@ -1,5 +1,4 @@ #include "http_server.h" -#include "adc.h" #include "cJSON.h" #include "esp_chip_info.h" #include "esp_http_server.h" diff --git a/main/main.c b/main/main.c index e282f838..2a3a3067 100644 --- a/main/main.c +++ b/main/main.c @@ -25,8 +25,14 @@ void app_main(void) { ESP_ERROR_CHECK(nvs_flash_init()); - ESP_LOGI(TAG, "NVS_CONFIG_ASIC_FREQ %f", (float) nvs_config_get_u16(NVS_CONFIG_ASIC_FREQ, CONFIG_ASIC_FREQUENCY)); GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value = nvs_config_get_u16(NVS_CONFIG_ASIC_FREQ, CONFIG_ASIC_FREQUENCY); + ESP_LOGI(TAG, "NVS_CONFIG_ASIC_FREQ %f", (float)GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value); + + GLOBAL_STATE.asic_count = nvs_config_get_u16(NVS_CONFIG_ASIC_COUNT, 1); + ESP_LOGI(TAG, "NVS_CONFIG_ASIC_COUNT %f", (float)GLOBAL_STATE.asic_count); + + GLOBAL_STATE.voltage_domain = nvs_config_get_u16(NVS_CONFIG_VOLTAGE_DOMAIN, 1); + ESP_LOGI(TAG, "NVS_CONFIG_VOLTAGE_DOMAIN %f", (float)GLOBAL_STATE.voltage_domain); GLOBAL_STATE.device_model_str = nvs_config_get_string(NVS_CONFIG_DEVICE_MODEL, ""); if (strcmp(GLOBAL_STATE.device_model_str, "max") == 0) { diff --git a/main/nvs_config.h b/main/nvs_config.h index 84dd4fe2..05ffc48a 100644 --- a/main/nvs_config.h +++ b/main/nvs_config.h @@ -15,6 +15,8 @@ #define NVS_CONFIG_ASIC_FREQ "asicfrequency" #define NVS_CONFIG_ASIC_VOLTAGE "asicvoltage" #define NVS_CONFIG_ASIC_MODEL "asicmodel" +#define NVS_CONFIG_ASIC_COUNT "asiccount" +#define NVS_CONFIG_VOLTAGE_DOMAIN "voltagedomain" #define NVS_CONFIG_DEVICE_MODEL "devicemodel" #define NVS_CONFIG_BOARD_VERSION "boardversion" #define NVS_CONFIG_FLIP_SCREEN "flipscreen" diff --git a/main/vcore.c b/main/vcore.c index 7bd27985..7c433456 100644 --- a/main/vcore.c +++ b/main/vcore.c @@ -57,7 +57,7 @@ bool VCORE_set_voltage(float core_voltage, GlobalState * global_state) case DEVICE_MAX: case DEVICE_ULTRA: case DEVICE_SUPRA: - reg_setting = ds4432_tps40305_bitaxe_voltage_to_reg(core_voltage); + reg_setting = ds4432_tps40305_bitaxe_voltage_to_reg(core_voltage * global_state->voltage_domain); ESP_LOGI(TAG, "Set ASIC voltage = %.3fV [0x%02X]", core_voltage, reg_setting); DS4432U_set_current_code(0, reg_setting); /// eek! break; @@ -69,5 +69,5 @@ bool VCORE_set_voltage(float core_voltage, GlobalState * global_state) } uint16_t VCORE_get_voltage_mv(GlobalState * global_state) { - return ADC_get_vcore(); + return ADC_get_vcore() / global_state->voltage_domain; } diff --git a/readme.md b/readme.md index fdcbd2b8..a94bee6f 100755 --- a/readme.md +++ b/readme.md @@ -26,7 +26,7 @@ Starting with v2.0.0, the ESP-Miner firmware requires some basic manufacturing d 1. Download the esp-miner-factory-v2.0.3.bin file from the release tab. Click [here](https://github.com/skot/ESP-Miner/releases) for the release tab -2. Copy `config.cvs.example` to `config.cvs` and modify `asicfrequency`, `asicvoltage`, `asicmodel`, `devicemodel`, and `boardversion` +2. Copy `config.cvs.example` to `config.cvs` and modify `asicfrequency`, `asicvoltage`, `asicmodel`, `asiccount`, `voltagedomain`, `devicemodel`, and `boardversion` The following are recommendations but it is necessary that you do have all values in your `config.cvs`file to flash properly. @@ -38,6 +38,8 @@ The following are recommendations but it is necessary that you do have all value asicfrequency,data,u16,490 asicvoltage,data,u16,1200 asicmodel,data,string,BM1368 + asiccount,data,u16,1 + voltagedomain,data,u16,1 devicemodel,data,string,supra boardversion,data,string,400 ``` @@ -50,6 +52,8 @@ The following are recommendations but it is necessary that you do have all value asicfrequency,data,u16,485 asicvoltage,data,u16,1200 asicmodel,data,string,BM1366 + asiccount,data,u16,1 + voltagedomain,data,u16,1 devicemodel,data,string,ultra boardversion,data,string,0.11 ``` @@ -62,6 +66,8 @@ The following are recommendations but it is necessary that you do have all value asicfrequency,data,u16,475 asicvoltage,data,u16,1400 asicmodel,data,string,BM1397 + asiccount,data,u16,1 + voltagedomain,data,u16,1 devicemodel,data,string,max boardversion,data,string,2.2 ``` From 5b38d332ce999ccfaed654eb5a3257cd5f77c98b Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Thu, 6 Jun 2024 16:36:40 +0200 Subject: [PATCH 2/8] distribute chip address to all chip available --- components/bm1397/bm1366.c | 29 +++++++++++---------- components/bm1397/bm1368.c | 25 +++++++++--------- components/bm1397/bm1397.c | 41 +++++++++++++++++++----------- components/bm1397/include/bm1366.h | 2 +- components/bm1397/include/bm1368.h | 2 +- components/bm1397/include/bm1397.h | 2 +- main/global_state.h | 2 +- main/main.c | 2 +- main/self_test/self_test.c | 4 +-- 9 files changed, 62 insertions(+), 47 deletions(-) diff --git a/components/bm1397/bm1366.c b/components/bm1397/bm1366.c index 4833acf8..738bc716 100644 --- a/components/bm1397/bm1366.c +++ b/components/bm1397/bm1366.c @@ -399,7 +399,7 @@ static void do_frequency_ramp_up() _send_simple(init793, 11); } -static uint8_t _send_init(uint64_t frequency) +static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) { // //send serial data @@ -418,8 +418,9 @@ static uint8_t _send_init(uint64_t frequency) // unsigned char init3[6] = { 0x00, 0x18, 0xFF, 0x0F, 0xC1, 0x00 }; // _send_BM1366((TYPE_CMD | GROUP_ALL | CMD_WRITE), init3, 6, true); - // unsigned char init4[7] = { 0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03 }; - // _send_simple(init4, 7); + // _send_chain_inactive(); + // // unsigned char init4[7] = { 0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03 }; + // // _send_simple(init4, 7); // unsigned char init5[7] = { 0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C }; // _send_simple(init5, 7); @@ -454,7 +455,7 @@ static uint8_t _send_init(uint64_t frequency) break; } } - ESP_LOGI(TAG, "%i chip(s) detected on the chain", chip_counter); + ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count); unsigned char init4[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x00, 0x00, 0x03}; _send_simple(init4, 11); @@ -462,11 +463,16 @@ static uint8_t _send_init(uint64_t frequency) unsigned char init5[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x18, 0xFF, 0x0F, 0xC1, 0x00, 0x00}; _send_simple(init5, 11); - unsigned char init6[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03}; - _send_simple(init6, 7); + _send_chain_inactive(); + // unsigned char init6[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03}; + // _send_simple(init6, 7); - unsigned char init7[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C}; - _send_simple(init7, 7); + // split the chip address space evenly + for (uint8_t i = 0; i < chip_counter; i++) { + _set_chip_address(i * (256 / chip_counter)); + // unsigned char init7[7] = { 0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C }; + // _send_simple(init7, 7); + } unsigned char init135[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x85, 0x40, 0x0C}; _send_simple(init135, 11); @@ -540,7 +546,7 @@ static void _send_read_address(void) _send_BM1366((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false); } -uint8_t BM1366_init(uint64_t frequency) +uint8_t BM1366_init(uint64_t frequency, uint16_t asic_count) { ESP_LOGI(TAG, "Initializing BM1366"); @@ -552,10 +558,7 @@ uint8_t BM1366_init(uint64_t frequency) // reset the bm1366 _reset(); - // send the init command - //_send_read_address(); - - return _send_init(frequency); + return _send_init(frequency, asic_count); } // Baud formula = 25M/((denominator+1)*8) diff --git a/components/bm1397/bm1368.c b/components/bm1397/bm1368.c index 2d5575fd..93930463 100644 --- a/components/bm1397/bm1368.c +++ b/components/bm1397/bm1368.c @@ -266,7 +266,7 @@ static void do_frequency_ramp_up() { } } -static uint8_t _send_init(uint64_t frequency) +static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) { //enable and set version rolling mask to 0xFFFF @@ -293,7 +293,7 @@ static uint8_t _send_init(uint64_t frequency) break; } } - ESP_LOGI(TAG, "%i chip(s) detected on the chain", chip_counter); + ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count); //enable and set version rolling mask to 0xFFFF (again) unsigned char init4[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C}; @@ -308,12 +308,16 @@ static uint8_t _send_init(uint64_t frequency) _send_simple(init6, 11); //chain inactive - unsigned char init7[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03}; - _send_simple(init7, 7); + _send_chain_inactive(); + // unsigned char init7[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03}; + // _send_simple(init7, 7); - //assign address 0x00 to the first chip - unsigned char init8[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C}; - _send_simple(init8, 7); + // split the chip address space evenly + for (uint8_t i = 0; i < chip_counter; i++) { + _set_chip_address(i * (256 / chip_counter)); + // unsigned char init8[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C}; + // _send_simple(init8, 7); + } //Core Register Control unsigned char init9[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x8B, 0x00, 0x12}; @@ -386,7 +390,7 @@ static void _send_read_address(void) _send_BM1368((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false); } -uint8_t BM1368_init(uint64_t frequency) +uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count) { ESP_LOGI(TAG, "Initializing BM1368"); @@ -398,10 +402,7 @@ uint8_t BM1368_init(uint64_t frequency) // reset the bm1368 _reset(); - // send the init command - //_send_read_address(); - - return _send_init(frequency); + return _send_init(frequency, asic_count); } // Baud formula = 25M/((denominator+1)*8) diff --git a/components/bm1397/bm1397.c b/components/bm1397/bm1397.c index b8eb6084..329df1d5 100644 --- a/components/bm1397/bm1397.c +++ b/components/bm1397/bm1397.c @@ -104,6 +104,13 @@ static void _send_BM1397(uint8_t header, uint8_t *data, uint8_t data_len, bool d free(buf); } +static void _send_read_address(void) +{ + unsigned char read_address[2] = {0x00, 0x00}; + // send serial data + _send_BM1397((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false); +} + static void _send_chain_inactive(void) { @@ -209,14 +216,29 @@ void BM1397_send_hash_frequency(float frequency) ESP_LOGI(TAG, "Setting Frequency to %.2fMHz (%.2f)", frequency, newf); } -static void _send_init(uint64_t frequency) +static void _send_init(uint64_t frequency, uint16_t asic_count) { + // send the init command + _send_read_address(); + + int chip_counter = 0; + while (true) { + if (SERIAL_rx(asic_response_buffer, 11, 1000) > 0) { + chip_counter++; + } else { + break; + } + } + ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count); // send serial data vTaskDelay(SLEEP_TIME / portTICK_PERIOD_MS); _send_chain_inactive(); - _set_chip_address(0x00); + // split the chip address space evenly + for (uint8_t i = 0; i < asic_count; i++) { + _set_chip_address(i * (256 / asic_count)); + } unsigned char init[6] = {0x00, CLOCK_ORDER_CONTROL_0, 0x00, 0x00, 0x00, 0x00}; // init1 - clock_order_control0 _send_BM1397((TYPE_CMD | GROUP_ALL | CMD_WRITE), init, 6, false); @@ -258,15 +280,7 @@ static void _reset(void) vTaskDelay(100 / portTICK_PERIOD_MS); } -static void _send_read_address(void) -{ - - unsigned char read_address[2] = {0x00, 0x00}; - // send serial data - _send_BM1397((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false); -} - -void BM1397_init(uint64_t frequency) +void BM1397_init(uint64_t frequency, uint16_t asic_count) { ESP_LOGI(TAG, "Initializing BM1397"); @@ -278,10 +292,7 @@ void BM1397_init(uint64_t frequency) // reset the bm1397 _reset(); - // send the init command - _send_read_address(); - - _send_init(frequency); + _send_init(frequency, asic_count); } // Baud formula = 25M/((denominator+1)*8) diff --git a/components/bm1397/include/bm1366.h b/components/bm1397/include/bm1366.h index af61461e..1cbb60e1 100644 --- a/components/bm1397/include/bm1366.h +++ b/components/bm1397/include/bm1366.h @@ -32,7 +32,7 @@ typedef struct __attribute__((__packed__)) uint8_t version[4]; } BM1366_job; -uint8_t BM1366_init(uint64_t frequency); +uint8_t BM1366_init(uint64_t frequency, uint16_t asic_count); void BM1366_send_init(void); void BM1366_send_work(void * GLOBAL_STATE, bm_job * next_bm_job); diff --git a/components/bm1397/include/bm1368.h b/components/bm1397/include/bm1368.h index c686c3c9..b75235c5 100644 --- a/components/bm1397/include/bm1368.h +++ b/components/bm1397/include/bm1368.h @@ -33,7 +33,7 @@ typedef struct __attribute__((__packed__)) uint8_t version[4]; } BM1368_job; -uint8_t BM1368_init(uint64_t frequency); +uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count); uint8_t BM1368_send_init(void); void BM1368_send_work(void * GLOBAL_STATE, bm_job * next_bm_job); diff --git a/components/bm1397/include/bm1397.h b/components/bm1397/include/bm1397.h index fc1a7456..d784911e 100644 --- a/components/bm1397/include/bm1397.h +++ b/components/bm1397/include/bm1397.h @@ -46,7 +46,7 @@ typedef struct __attribute__((__packed__)) uint8_t midstate3[32]; } job_packet; -void BM1397_init(uint64_t frequency); +void BM1397_init(uint64_t frequency, uint16_t asic_count); void BM1397_send_work(void * GLOBAL_STATE, bm_job * next_bm_job); void BM1397_set_job_difficulty_mask(int); diff --git a/main/global_state.h b/main/global_state.h index fd2d5670..e4034aa1 100644 --- a/main/global_state.h +++ b/main/global_state.h @@ -30,7 +30,7 @@ typedef enum typedef struct { - uint8_t (*init_fn)(uint64_t); + uint8_t (*init_fn)(uint64_t, uint16_t); task_result * (*receive_result_fn)(void * GLOBAL_STATE); int (*set_max_baud_fn)(void); void (*set_difficulty_mask_fn)(int); diff --git a/main/main.c b/main/main.c index 2a3a3067..001c5711 100644 --- a/main/main.c +++ b/main/main.c @@ -165,7 +165,7 @@ void app_main(void) queue_init(&GLOBAL_STATE.ASIC_jobs_queue); SERIAL_init(); - (*GLOBAL_STATE.ASIC_functions.init_fn)(GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value); + (*GLOBAL_STATE.ASIC_functions.init_fn)(GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE.asic_count); SERIAL_set_baud((*GLOBAL_STATE.ASIC_functions.set_max_baud_fn)()); SERIAL_clear_buffer(); diff --git a/main/self_test/self_test.c b/main/self_test/self_test.c index 85f6a680..b9814d44 100644 --- a/main/self_test/self_test.c +++ b/main/self_test/self_test.c @@ -98,8 +98,8 @@ void self_test(void * pvParameters) SERIAL_init(); - uint8_t chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value); - ESP_LOGI(TAG, "%u chips detected", chips_detected); + uint8_t chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->asic_count); + ESP_LOGI(TAG, "%u chips detected, %u expected", chips_detected, GLOBAL_STATE->asic_count); int baud = (*GLOBAL_STATE->ASIC_functions.set_max_baud_fn)(); vTaskDelay(10 / portTICK_PERIOD_MS); From 771210e8f10d915902b81eb83b3271dbb8094887 Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Thu, 6 Jun 2024 16:45:41 +0200 Subject: [PATCH 3/8] scale job rate to nonce space sharing between multi chips --- main/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/main/main.c b/main/main.c index 001c5711..2f9ddfde 100644 --- a/main/main.c +++ b/main/main.c @@ -58,7 +58,7 @@ void app_main(void) .set_max_baud_fn = BM1366_set_max_baud, .set_difficulty_mask_fn = BM1366_set_job_difficulty_mask, .send_work_fn = BM1366_send_work}; - GLOBAL_STATE.asic_job_frequency_ms = BM1366_FULLSCAN_MS; + GLOBAL_STATE.asic_job_frequency_ms = BM1366_FULLSCAN_MS / (double) GLOBAL_STATE.asic_count; GLOBAL_STATE.initial_ASIC_difficulty = BM1366_INITIAL_DIFFICULTY; GLOBAL_STATE.ASIC_functions = ASIC_functions; @@ -72,7 +72,7 @@ void app_main(void) .send_work_fn = BM1368_send_work}; uint64_t bm1368_hashrate = GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1368_CORE_COUNT * 1000000; - GLOBAL_STATE.asic_job_frequency_ms = ((double) NONCE_SPACE / (double) bm1368_hashrate) * 1000; + GLOBAL_STATE.asic_job_frequency_ms = (((double) NONCE_SPACE / (double) bm1368_hashrate) * 1000) / (double) GLOBAL_STATE.asic_count; GLOBAL_STATE.initial_ASIC_difficulty = BM1368_INITIAL_DIFFICULTY; GLOBAL_STATE.ASIC_functions = ASIC_functions; @@ -86,7 +86,7 @@ void app_main(void) .send_work_fn = BM1397_send_work}; uint64_t bm1397_hashrate = GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1397_CORE_COUNT * 1000000; - GLOBAL_STATE.asic_job_frequency_ms = ((double) NONCE_SPACE / (double) bm1397_hashrate) * 1000; + GLOBAL_STATE.asic_job_frequency_ms = (((double) NONCE_SPACE / (double) bm1397_hashrate) * 1000) / (double) GLOBAL_STATE.asic_count; GLOBAL_STATE.initial_ASIC_difficulty = BM1397_INITIAL_DIFFICULTY; GLOBAL_STATE.ASIC_functions = ASIC_functions; From 271d091b030dbd8b8987c13d38628014fcc45cf2 Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Thu, 6 Jun 2024 17:34:39 +0200 Subject: [PATCH 4/8] cosmetic --- main/system.c | 1 + main/tasks/power_management_task.c | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/main/system.c b/main/system.c index 363cb204..911c7f7c 100644 --- a/main/system.c +++ b/main/system.c @@ -82,6 +82,7 @@ static void _init_system(GlobalState * global_state, SystemModule * module) ESP_ERROR_CHECK(i2c_master_init()); ESP_LOGI(TAG, "I2C initialized successfully"); + // Initialize the core voltage regulator VCORE_init(global_state); VCORE_set_voltage(nvs_config_get_u16(NVS_CONFIG_ASIC_VOLTAGE, CONFIG_ASIC_VOLTAGE) / 1000.0, global_state); diff --git a/main/tasks/power_management_task.c b/main/tasks/power_management_task.c index f84c8a5d..769ad183 100644 --- a/main/tasks/power_management_task.c +++ b/main/tasks/power_management_task.c @@ -34,7 +34,6 @@ static float _fbound(float value, float lower_bound, float upper_bound) void POWER_MANAGEMENT_task(void * pvParameters) { - GlobalState * GLOBAL_STATE = (GlobalState *) pvParameters; PowerManagementModule * power_management = &GLOBAL_STATE->POWER_MANAGEMENT_MODULE; From 525beb7379d5da8356b0e2e2f126bd258363d102 Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Thu, 6 Jun 2024 20:08:33 +0200 Subject: [PATCH 5/8] dynamic Hashrate calculation in AxeOS (with multi chip support) --- .../src/app/components/home/home.component.ts | 16 +--------------- .../axe-os/src/app/services/system.service.ts | 2 ++ .../http_server/axe-os/src/models/ISystemInfo.ts | 2 ++ main/http_server/http_server.c | 14 ++++++++++++++ 4 files changed, 19 insertions(+), 15 deletions(-) diff --git a/main/http_server/axe-os/src/app/components/home/home.component.ts b/main/http_server/axe-os/src/app/components/home/home.component.ts index 7330550c..f3ea5177 100644 --- a/main/http_server/axe-os/src/app/components/home/home.component.ts +++ b/main/http_server/axe-os/src/app/components/home/home.component.ts @@ -132,21 +132,7 @@ export class HomeComponent { ); this.expectedHashRate$ = this.info$.pipe(map(info => { - if (info.ASICModel === eASICModel.BM1366) { - const version = parseInt(info.boardVersion); - if (version >= 400 && version < 500) { - return Math.floor(info.frequency * ((894 * 6) / 1000)) - } else { - return Math.floor(info.frequency * (894 / 1000)) - } - } else if (info.ASICModel === eASICModel.BM1397) { - return Math.floor(info.frequency * (672 / 1000)) - } else if (info.ASICModel === eASICModel.BM1368) { - return Math.floor(info.frequency * (1276 / 1000)) - } - - return undefined; - + return Math.floor(info.frequency * ((info.coreCount * info.asicCount) / 1000)) })) this.quickLink$ = this.info$.pipe( diff --git a/main/http_server/axe-os/src/app/services/system.service.ts b/main/http_server/axe-os/src/app/services/system.service.ts index 8f0f7c41..05be0d07 100644 --- a/main/http_server/axe-os/src/app/services/system.service.ts +++ b/main/http_server/axe-os/src/app/services/system.service.ts @@ -39,6 +39,8 @@ export class SystemService { sharesAccepted: 1, sharesRejected: 0, uptimeSeconds: 38, + asicCount: 1, + coreCount: 672, ASICModel: eASICModel.BM1366, stratumURL: "public-pool.io", stratumPort: 21496, diff --git a/main/http_server/axe-os/src/models/ISystemInfo.ts b/main/http_server/axe-os/src/models/ISystemInfo.ts index 3235e62d..2aeb765f 100644 --- a/main/http_server/axe-os/src/models/ISystemInfo.ts +++ b/main/http_server/axe-os/src/models/ISystemInfo.ts @@ -20,6 +20,8 @@ export interface ISystemInfo { sharesAccepted: number, sharesRejected: number, uptimeSeconds: number, + asicCount: number, + coreCount: number, ASICModel: eASICModel, stratumURL: string, stratumPort: number, diff --git a/main/http_server/http_server.c b/main/http_server/http_server.c index 57e215d8..0ef8a8e7 100644 --- a/main/http_server/http_server.c +++ b/main/http_server/http_server.c @@ -376,6 +376,20 @@ static esp_err_t GET_system_info(httpd_req_t * req) cJSON_AddNumberToObject(root, "sharesAccepted", GLOBAL_STATE->SYSTEM_MODULE.shares_accepted); cJSON_AddNumberToObject(root, "sharesRejected", GLOBAL_STATE->SYSTEM_MODULE.shares_rejected); cJSON_AddNumberToObject(root, "uptimeSeconds", (esp_timer_get_time() - GLOBAL_STATE->SYSTEM_MODULE.start_time) / 1000000); + cJSON_AddNumberToObject(root, "asicCount", GLOBAL_STATE->asic_count); + uint16_t core_count = 0; + switch (GLOBAL_STATE->asic_model){ + case ASIC_BM1397: + core_count = BM1397_CORE_COUNT; + break; + case ASIC_BM1366: + core_count = BM1366_CORE_COUNT; + break; + case ASIC_BM1368: + core_count = BM1368_CORE_COUNT; + break; + } + cJSON_AddNumberToObject(root, "coreCount", core_count); cJSON_AddStringToObject(root, "ASICModel", GLOBAL_STATE->asic_model_str); cJSON_AddStringToObject(root, "stratumURL", stratumURL); cJSON_AddNumberToObject(root, "stratumPort", nvs_config_get_u16(NVS_CONFIG_STRATUM_PORT, CONFIG_STRATUM_PORT)); From 95a2a8c605f682f9fb02c914938c0327b3fdd3d3 Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Fri, 7 Jun 2024 21:52:12 +0200 Subject: [PATCH 6/8] loop over regA8 for all chips --- components/bm1397/bm1366.c | 29 ++++++++++++++-------------- components/bm1397/bm1368.c | 39 +++++++++++++++++++------------------- 2 files changed, 33 insertions(+), 35 deletions(-) diff --git a/components/bm1397/bm1366.c b/components/bm1397/bm1366.c index 738bc716..d73f28d3 100644 --- a/components/bm1397/bm1366.c +++ b/components/bm1397/bm1366.c @@ -468,8 +468,9 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) // _send_simple(init6, 7); // split the chip address space evenly + uint8_t address_interval = (uint8_t) (256 / chip_counter); for (uint8_t i = 0; i < chip_counter; i++) { - _set_chip_address(i * (256 / chip_counter)); + _set_chip_address(i * address_interval); // unsigned char init7[7] = { 0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C }; // _send_simple(init7, 7); } @@ -495,20 +496,18 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) unsigned char init173[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x28, 0x11, 0x30, 0x02, 0x00, 0x03}; _send_simple(init173, 11); - unsigned char init174[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x01, 0xF0, 0x15}; - _send_simple(init174, 11); - - unsigned char init175[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x18, 0xF0, 0x00, 0xC1, 0x00, 0x0C}; - _send_simple(init175, 11); - - unsigned char init176[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x85, 0x40, 0x04}; - _send_simple(init176, 11); - - unsigned char init177[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x80, 0x20, 0x11}; - _send_simple(init177, 11); - - unsigned char init178[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x82, 0xAA, 0x05}; - _send_simple(init178, 11); + for (uint8_t i = 0; i < chip_counter; i++) { + unsigned char set_a8_register[6] = {i * address_interval, 0xA8, 0x00, 0x07, 0x01, 0xF0}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, true); + unsigned char set_18_register[6] = {i * address_interval, 0x18, 0xF0, 0x00, 0xC1, 0x00}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, true); + unsigned char set_3c_register_first[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x85, 0x40}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, true); + unsigned char set_3c_register_second[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x80, 0x20}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, true); + unsigned char set_3c_register_third[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x82, 0xAA}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, true); + } do_frequency_ramp_up(); diff --git a/components/bm1397/bm1368.c b/components/bm1397/bm1368.c index 93930463..77b05c32 100644 --- a/components/bm1397/bm1368.c +++ b/components/bm1397/bm1368.c @@ -313,8 +313,9 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) // _send_simple(init7, 7); // split the chip address space evenly + uint8_t address_interval = (uint8_t) (256 / chip_counter); for (uint8_t i = 0; i < chip_counter; i++) { - _set_chip_address(i * (256 / chip_counter)); + _set_chip_address(i * address_interval); // unsigned char init8[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C}; // _send_simple(init8, 7); } @@ -340,25 +341,23 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) unsigned char init13[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x58, 0x02, 0x11, 0x11, 0x11, 0x06}; _send_simple(init13, 11); - //Reg_A8 - unsigned char init14[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x01, 0xF0, 0x15}; - _send_simple(init14, 11); - - //Misc Control - unsigned char init15[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x18, 0xF0, 0x00, 0xC1, 0x00, 0x0C}; - _send_simple(init15, 11); - - //Core Register Control - unsigned char init16[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x8B, 0x00, 0x1A}; - _send_simple(init16, 11); - - //Core Register Control - unsigned char init17[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x80, 0x18, 0x17}; - _send_simple(init17, 11); - - //Core Register Control - unsigned char init18[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x82, 0xAA, 0x05}; - _send_simple(init18, 11); + for (uint8_t i = 0; i < chip_counter; i++) { + //Reg_A8 + unsigned char set_a8_register[6] = {i * address_interval, 0xA8, 0x00, 0x07, 0x01, 0xF0}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, true); + //Misc Control + unsigned char set_18_register[6] = {i * address_interval, 0x18, 0xF0, 0x00, 0xC1, 0x00}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, true); + //Core Register Control + unsigned char set_3c_register_first[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x8B, 0x00}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, true); + //Core Register Control + unsigned char set_3c_register_second[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x80, 0x18}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, true); + //Core Register Control + unsigned char set_3c_register_third[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x82, 0xAA}; + _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, true); + } do_frequency_ramp_up(); From 17852f03c593d172a94d22497a5d5714e8d8046f Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Fri, 7 Jun 2024 21:59:04 +0200 Subject: [PATCH 7/8] oups --- components/bm1397/bm1368.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/components/bm1397/bm1368.c b/components/bm1397/bm1368.c index 77b05c32..b2553b61 100644 --- a/components/bm1397/bm1368.c +++ b/components/bm1397/bm1368.c @@ -344,19 +344,19 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count) for (uint8_t i = 0; i < chip_counter; i++) { //Reg_A8 unsigned char set_a8_register[6] = {i * address_interval, 0xA8, 0x00, 0x07, 0x01, 0xF0}; - _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, true); + _send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, true); //Misc Control unsigned char set_18_register[6] = {i * address_interval, 0x18, 0xF0, 0x00, 0xC1, 0x00}; - _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, true); + _send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, true); //Core Register Control unsigned char set_3c_register_first[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x8B, 0x00}; - _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, true); + _send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, true); //Core Register Control unsigned char set_3c_register_second[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x80, 0x18}; - _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, true); + _send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, true); //Core Register Control unsigned char set_3c_register_third[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x82, 0xAA}; - _send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, true); + _send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, true); } do_frequency_ramp_up(); From 5e305ba6c7b4c0e26c2a1496716ec7b572c9488a Mon Sep 17 00:00:00 2001 From: Georges Palauqui Date: Mon, 10 Jun 2024 10:02:36 +0200 Subject: [PATCH 8/8] no need to introuce new NVS parameters, they can be derived from the device_model ! --- config-401.cvs | 2 -- config.cvs.example | 2 -- main/main.c | 12 ++++++------ main/nvs_config.h | 2 -- readme.md | 8 +------- 5 files changed, 7 insertions(+), 19 deletions(-) diff --git a/config-401.cvs b/config-401.cvs index b179e1f6..34527d5a 100644 --- a/config-401.cvs +++ b/config-401.cvs @@ -10,8 +10,6 @@ stratumpass,data,string,x asicfrequency,data,u16,490 asicvoltage,data,u16,1166 asicmodel,data,string,BM1368 -asiccount,data,u16,1 -voltagedomain,data,u16,1 devicemodel,data,string,supra boardversion,data,string,401 flipscreen,data,u16,1 diff --git a/config.cvs.example b/config.cvs.example index ffb2d6c0..6afb4714 100644 --- a/config.cvs.example +++ b/config.cvs.example @@ -10,8 +10,6 @@ stratumpass,data,string,x asicfrequency,data,u16,485 asicvoltage,data,u16,1200 asicmodel,data,string,BM1366 -asiccount,data,u16,1 -voltagedomain,data,u16,1 devicemodel,data,string,ultra boardversion,data,string,204 flipscreen,data,u16,1 diff --git a/main/main.c b/main/main.c index 2f9ddfde..68cdd7d4 100644 --- a/main/main.c +++ b/main/main.c @@ -28,22 +28,22 @@ void app_main(void) GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value = nvs_config_get_u16(NVS_CONFIG_ASIC_FREQ, CONFIG_ASIC_FREQUENCY); ESP_LOGI(TAG, "NVS_CONFIG_ASIC_FREQ %f", (float)GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value); - GLOBAL_STATE.asic_count = nvs_config_get_u16(NVS_CONFIG_ASIC_COUNT, 1); - ESP_LOGI(TAG, "NVS_CONFIG_ASIC_COUNT %f", (float)GLOBAL_STATE.asic_count); - - GLOBAL_STATE.voltage_domain = nvs_config_get_u16(NVS_CONFIG_VOLTAGE_DOMAIN, 1); - ESP_LOGI(TAG, "NVS_CONFIG_VOLTAGE_DOMAIN %f", (float)GLOBAL_STATE.voltage_domain); - GLOBAL_STATE.device_model_str = nvs_config_get_string(NVS_CONFIG_DEVICE_MODEL, ""); if (strcmp(GLOBAL_STATE.device_model_str, "max") == 0) { ESP_LOGI(TAG, "DEVICE: Max"); GLOBAL_STATE.device_model = DEVICE_MAX; + GLOBAL_STATE.asic_count = 1; + GLOBAL_STATE.voltage_domain = 1; } else if (strcmp(GLOBAL_STATE.device_model_str, "ultra") == 0) { ESP_LOGI(TAG, "DEVICE: Ultra"); GLOBAL_STATE.device_model = DEVICE_ULTRA; + GLOBAL_STATE.asic_count = 1; + GLOBAL_STATE.voltage_domain = 1; } else if (strcmp(GLOBAL_STATE.device_model_str, "supra") == 0) { ESP_LOGI(TAG, "DEVICE: Supra"); GLOBAL_STATE.device_model = DEVICE_SUPRA; + GLOBAL_STATE.asic_count = 1; + GLOBAL_STATE.voltage_domain = 1; } else { ESP_LOGE(TAG, "Invalid DEVICE model"); // maybe should return here to now execute anything with a faulty device parameter ! diff --git a/main/nvs_config.h b/main/nvs_config.h index 05ffc48a..84dd4fe2 100644 --- a/main/nvs_config.h +++ b/main/nvs_config.h @@ -15,8 +15,6 @@ #define NVS_CONFIG_ASIC_FREQ "asicfrequency" #define NVS_CONFIG_ASIC_VOLTAGE "asicvoltage" #define NVS_CONFIG_ASIC_MODEL "asicmodel" -#define NVS_CONFIG_ASIC_COUNT "asiccount" -#define NVS_CONFIG_VOLTAGE_DOMAIN "voltagedomain" #define NVS_CONFIG_DEVICE_MODEL "devicemodel" #define NVS_CONFIG_BOARD_VERSION "boardversion" #define NVS_CONFIG_FLIP_SCREEN "flipscreen" diff --git a/readme.md b/readme.md index a94bee6f..3c376814 100755 --- a/readme.md +++ b/readme.md @@ -26,7 +26,7 @@ Starting with v2.0.0, the ESP-Miner firmware requires some basic manufacturing d 1. Download the esp-miner-factory-v2.0.3.bin file from the release tab. Click [here](https://github.com/skot/ESP-Miner/releases) for the release tab -2. Copy `config.cvs.example` to `config.cvs` and modify `asicfrequency`, `asicvoltage`, `asicmodel`, `asiccount`, `voltagedomain`, `devicemodel`, and `boardversion` +2. Copy `config.cvs.example` to `config.cvs` and modify `asicfrequency`, `asicvoltage`, `asicmodel`, `devicemodel`, and `boardversion` The following are recommendations but it is necessary that you do have all values in your `config.cvs`file to flash properly. @@ -38,8 +38,6 @@ The following are recommendations but it is necessary that you do have all value asicfrequency,data,u16,490 asicvoltage,data,u16,1200 asicmodel,data,string,BM1368 - asiccount,data,u16,1 - voltagedomain,data,u16,1 devicemodel,data,string,supra boardversion,data,string,400 ``` @@ -53,8 +51,6 @@ The following are recommendations but it is necessary that you do have all value asicvoltage,data,u16,1200 asicmodel,data,string,BM1366 asiccount,data,u16,1 - voltagedomain,data,u16,1 - devicemodel,data,string,ultra boardversion,data,string,0.11 ``` @@ -66,8 +62,6 @@ The following are recommendations but it is necessary that you do have all value asicfrequency,data,u16,475 asicvoltage,data,u16,1400 asicmodel,data,string,BM1397 - asiccount,data,u16,1 - voltagedomain,data,u16,1 devicemodel,data,string,max boardversion,data,string,2.2 ```