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Fix low hashrate, fix overheat boot loop

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This commit is contained in:
Benjamin Wilson 2024-06-22 19:15:25 -04:00
parent 19aa080202
commit 336ed3aaa9
5 changed files with 31 additions and 18 deletions
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14
main/EMC2101.c
View File

@ -3,6 +3,8 @@
#include "EMC2101.h"
static const char * TAG = "EMC2101";
// static const char *TAG = "EMC2101.c";
// run this first. sets up the config register
@ -55,11 +57,19 @@ float EMC2101_get_external_temp(void)
ESP_ERROR_CHECK(i2c_master_register_read(EMC2101_I2CADDR_DEFAULT, EMC2101_EXTERNAL_TEMP_MSB, &temp_msb, 1));
ESP_ERROR_CHECK(i2c_master_register_read(EMC2101_I2CADDR_DEFAULT, EMC2101_EXTERNAL_TEMP_LSB, &temp_lsb, 1));
reading = temp_lsb | (temp_msb << 8);
reading >>= 5;
return (float) reading / 8.0;
if (reading == EMC2101_TEMP_FAULT_OPEN_CIRCUIT) {
ESP_LOGE(TAG, "EMC2101 TEMP_FAULT_OPEN_CIRCUIT");
}
if (reading == EMC2101_TEMP_FAULT_SHORT) {
ESP_LOGE(TAG, "EMC2101 TEMP_FAULT_SHORT");
}
float result = (float) reading / 8.0;
return result;
}
uint8_t EMC2101_get_internal_temp(void)

2
main/EMC2101.h
View File

@ -11,6 +11,8 @@
#define EMC2101_INTERNAL_TEMP 0x00 ///< The internal temperature register
#define EMC2101_EXTERNAL_TEMP_MSB 0x01 ///< high byte for the external temperature reading
#define EMC2101_EXTERNAL_TEMP_LSB 0x10 ///< low byte for the external temperature reading
#define EMC2101_TEMP_FAULT_OPEN_CIRCUIT 0x3F8
#define EMC2101_TEMP_FAULT_SHORT 0x3FF
#define EMC2101_STATUS 0x02 ///< Status register
#define EMC2101_REG_CONFIG 0x03 ///< configuration register

4
main/main.c
View File

@ -66,7 +66,7 @@ void app_main(void)
.set_max_baud_fn = BM1366_set_max_baud,
.set_difficulty_mask_fn = BM1366_set_job_difficulty_mask,
.send_work_fn = BM1366_send_work};
GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1366_CORE_COUNT * 1000)) / (double) GLOBAL_STATE.asic_count; // version-rolling so Small Cores have different Nonce Space
GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1366_SMALL_CORE_COUNT * 1000)) / (double) GLOBAL_STATE.asic_count; // version-rolling so Small Cores have different Nonce Space
GLOBAL_STATE.initial_ASIC_difficulty = BM1366_INITIAL_DIFFICULTY;
GLOBAL_STATE.ASIC_functions = ASIC_functions;
@ -78,7 +78,7 @@ void app_main(void)
.set_max_baud_fn = BM1368_set_max_baud,
.set_difficulty_mask_fn = BM1368_set_job_difficulty_mask,
.send_work_fn = BM1368_send_work};
GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1368_CORE_COUNT * 1000)) / (double) GLOBAL_STATE.asic_count; // version-rolling so Small Cores have different Nonce Space
GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1368_SMALL_CORE_COUNT * 1000)) / (double) GLOBAL_STATE.asic_count; // version-rolling so Small Cores have different Nonce Space
GLOBAL_STATE.initial_ASIC_difficulty = BM1368_INITIAL_DIFFICULTY;
GLOBAL_STATE.ASIC_functions = ASIC_functions;

8
main/self_test/self_test.c
View File

@ -134,9 +134,11 @@ void self_test(void * pvParameters)
case DEVICE_MAX:
case DEVICE_ULTRA:
case DEVICE_SUPRA:
if(!DS4432U_test()){
ESP_LOGE(TAG, "DS4432 test failed!");
display_msg("DS4432U:FAIL", GLOBAL_STATE);
if(GLOBAL_STATE->board_version != 402){
if(!DS4432U_test()){
ESP_LOGE(TAG, "DS4432 test failed!");
display_msg("DS4432U:FAIL", GLOBAL_STATE);
}
}
break;
default:

21
main/tasks/power_management_task.c
View File

@ -112,11 +112,6 @@ void POWER_MANAGEMENT_task(void * pvParameters)
default:
}
if (GLOBAL_STATE->board_version == 402) {
// has already been done in system.c, why do it again here ?
VCORE_set_voltage(nvs_config_get_u16(NVS_CONFIG_ASIC_VOLTAGE, CONFIG_ASIC_VOLTAGE) / 1000.0, GLOBAL_STATE);
}
vTaskDelay(3000 / portTICK_PERIOD_MS);
while (1) {
@ -152,13 +147,13 @@ void POWER_MANAGEMENT_task(void * pvParameters)
if ((power_management->chip_temp_avg > THROTTLE_TEMP) &&
(power_management->frequency_value > 50 || power_management->voltage > 1000)) {
ESP_LOGE(TAG, "OVERHEAT");
ESP_LOGE(TAG, "OVERHEAT ASIC %fC", power_management->chip_temp_avg );
EMC2101_set_fan_speed(1);
if (power_management->HAS_POWER_EN) {
gpio_set_level(GPIO_NUM_10, 1);
}
nvs_config_set_u16(NVS_CONFIG_ASIC_VOLTAGE, 990);
nvs_config_set_u16(NVS_CONFIG_ASIC_VOLTAGE, 1000);
nvs_config_set_u16(NVS_CONFIG_ASIC_FREQ, 50);
nvs_config_set_u16(NVS_CONFIG_FAN_SPEED, 100);
nvs_config_set_u16(NVS_CONFIG_AUTO_FAN_SPEED, 0);
@ -182,9 +177,14 @@ void POWER_MANAGEMENT_task(void * pvParameters)
power_management->vr_temp = 0.0;
}
// EMC2101 will give bad readings if the ASIC is turned off
if(power_management->voltage < TPS546_INIT_VOUT_MIN){
break;
}
if ((power_management->vr_temp > TPS546_THROTTLE_TEMP || power_management->chip_temp_avg > THROTTLE_TEMP) &&
(power_management->frequency_value > 50 || power_management->voltage > 1000)) {
ESP_LOGE(TAG, "OVERHEAT");
ESP_LOGE(TAG, "OVERHEAT VR: %fC ASIC %fC", power_management->vr_temp, power_management->chip_temp_avg );
EMC2101_set_fan_speed(1);
if (GLOBAL_STATE->board_version == 402) {
@ -193,14 +193,13 @@ void POWER_MANAGEMENT_task(void * pvParameters)
} else if (power_management->HAS_POWER_EN) {
gpio_set_level(GPIO_NUM_10, 1);
}
nvs_config_set_u16(NVS_CONFIG_ASIC_VOLTAGE, 990);
nvs_config_set_u16(NVS_CONFIG_ASIC_VOLTAGE, 1000);
nvs_config_set_u16(NVS_CONFIG_ASIC_FREQ, 50);
nvs_config_set_u16(NVS_CONFIG_FAN_SPEED, 100);
nvs_config_set_u16(NVS_CONFIG_AUTO_FAN_SPEED, 0);
exit(EXIT_FAILURE);
}
// ESP_LOGI(TAG, "target %f, Freq %f, Volt %f, Power %f", target_frequency, power_management->frequency_value,
// power_management->voltage, power_management->power);
break;
default: