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ASIC version mask now based on pool stratum version mask msg (#349)

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* make set version mask a function call

* update name

* update init fuc to support version mask setting

* update parameter spec for bm1397

* parametrize set version rolling and update init func for BM136X +

* add default stratum mask

* update all bmchips with a new set_version_mask ASIC function which can be called in main

* update init func prototype params

* update self test to remove extra vmask call in init

* fix compiler errors

* fix compiler errors in main

* add version_mask_given bool to tell the next job to set a new version mask to the chip when a smg comes in
This commit is contained in:
adammwest
2024-09-26 16:30:06 +01:00
committed by GitHub
parent dede86211d
commit f130b05511
13 changed files with 69 additions and 30 deletions
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21
components/asic/bm1366.c
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@@ -126,6 +126,15 @@ static void _set_chip_address(uint8_t chipAddr)
_send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_SETADDRESS), read_address, 2, BM1366_SERIALTX_DEBUG);
}
void BM1366_set_version_mask(uint32_t version_mask)
{
int versions_to_roll = version_mask >> 13;
uint8_t version_byte0 = (versions_to_roll >> 8);
uint8_t version_byte1 = (versions_to_roll & 0xFF);
uint8_t version_cmd[] = {0x00, 0xA4, 0x90, 0x00, version_byte0, version_byte1};
_send_BM1366(TYPE_CMD | GROUP_ALL | CMD_WRITE, version_cmd, 6, BM1366_SERIALTX_DEBUG);
}
void BM1366_send_hash_frequency(float target_freq)
{
// default 200Mhz if it fails
@@ -402,14 +411,10 @@ static void do_frequency_ramp_up()
static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
{
unsigned char init0[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init0, 11);
unsigned char init1[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init1, 11);
unsigned char init2[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init2, 11);
// set version mask
for (int i = 0; i < 3; i++) {
BM1366_set_version_mask(STRATUM_DEFAULT_VERSION_MASK);
}
// read register 00 on all chips
unsigned char init3[7] = {0x55, 0xAA, 0x52, 0x05, 0x00, 0x00, 0x0A};

17
components/asic/bm1368.c
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@@ -108,6 +108,15 @@ static void _set_chip_address(uint8_t chipAddr)
_send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_SETADDRESS), read_address, 2, BM1368_SERIALTX_DEBUG);
}
void BM1368_set_version_mask(uint32_t version_mask)
{
int versions_to_roll = version_mask >> 13;
uint8_t version_byte0 = (versions_to_roll >> 8);
uint8_t version_byte1 = (versions_to_roll & 0xFF);
uint8_t version_cmd[] = {0x00, 0xA4, 0x90, 0x00, version_byte0, version_byte1};
_send_BM1368(TYPE_CMD | GROUP_ALL | CMD_WRITE, version_cmd, 6, BM1368_SERIALTX_DEBUG);
}
static void _reset(void)
{
gpio_set_level(BM1368_RST_PIN, 0);
@@ -218,6 +227,8 @@ static int count_asic_chips(void) {
return chip_counter;
}
static void do_frequency_ramp_up(float target_frequency) {
ESP_LOGI(TAG, "Ramping up frequency from %.2f MHz to %.2f MHz", current_frequency, target_frequency);
do_frequency_transition(target_frequency);
@@ -234,9 +245,9 @@ uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count)
_reset();
uint8_t init_cmd[] = {0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF};
// set version mask
for (int i = 0; i < 4; i++) {
_send_BM1368(TYPE_CMD | GROUP_ALL | CMD_WRITE, init_cmd, 6, false);
BM1368_set_version_mask(STRATUM_DEFAULT_VERSION_MASK);
}
int chip_counter = count_asic_chips();
@@ -285,7 +296,7 @@ uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count)
do_frequency_ramp_up((float)frequency);
_send_BM1368(TYPE_CMD | GROUP_ALL | CMD_WRITE, (uint8_t[]){0x00, 0x10, 0x00, 0x00, 0x15, 0xa4}, 6, false);
_send_BM1368(TYPE_CMD | GROUP_ALL | CMD_WRITE, (uint8_t[]){0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF}, 6, false);
BM1368_set_version_mask(STRATUM_DEFAULT_VERSION_MASK);
ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count);
return chip_counter;

30
components/asic/bm1370.c
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@@ -128,6 +128,15 @@ static void _set_chip_address(uint8_t chipAddr)
_send_BM1370((TYPE_CMD | GROUP_SINGLE | CMD_SETADDRESS), read_address, 2, BM1370_SERIALTX_DEBUG);
}
void BM1370_set_version_mask(uint32_t version_mask)
{
int versions_to_roll = version_mask >> 13;
uint8_t version_byte0 = (versions_to_roll >> 8);
uint8_t version_byte1 = (versions_to_roll & 0xFF);
uint8_t version_cmd[] = {0x00, 0xA4, 0x90, 0x00, version_byte0, version_byte1};
_send_BM1370(TYPE_CMD | GROUP_ALL | CMD_WRITE, version_cmd, 6, BM1370_SERIALTX_DEBUG);
}
void BM1370_send_hash_frequency(int id, float target_freq, float max_diff) {
uint8_t freqbuf[6] = {0x00, 0x08, 0x40, 0xA0, 0x02, 0x41};
uint8_t postdiv_min = 255;
@@ -197,18 +206,10 @@ static void do_frequency_ramp_up(float target_frequency) {
static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
{
//enable and set version rolling mask to 0xFFFF
unsigned char init0[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init0, 11);
//enable and set version rolling mask to 0xFFFF (again)
unsigned char init1[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init1, 11);
//enable and set version rolling mask to 0xFFFF (again)
unsigned char init2[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init2, 11);
// set version mask
for (int i = 0; i < 3; i++) {
BM1370_set_version_mask(STRATUM_DEFAULT_VERSION_MASK);
}
//read register 00 on all chips (should respond AA 55 13 68 00 00 00 00 00 00 0F)
unsigned char init3[7] = {0x55, 0xAA, 0x52, 0x05, 0x00, 0x00, 0x0A};
@@ -224,9 +225,8 @@ static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
}
ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count);
//enable and set version rolling mask to 0xFFFF (again)
unsigned char init4[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
_send_simple(init4, 11);
// set version mask
BM1370_set_version_mask(STRATUM_DEFAULT_VERSION_MASK);
//Reg_A8
unsigned char init5[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x00, 0x00, 0x03};

4
components/asic/bm1397.c
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@@ -127,6 +127,10 @@ static void _set_chip_address(uint8_t chipAddr)
_send_BM1397((TYPE_CMD | GROUP_SINGLE | CMD_SETADDRESS), read_address, 2, BM1937_SERIALTX_DEBUG);
}
void BM1397_set_version_mask(uint32_t version_mask) {
// placeholder
}
// borrowed from cgminer driver-gekko.c calc_gsf_freq()
void BM1397_send_hash_frequency(float frequency)
{

1
components/asic/include/bm1366.h
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@@ -40,6 +40,7 @@ uint8_t BM1366_init(uint64_t frequency, uint16_t asic_count);
void BM1366_send_init(void);
void BM1366_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);
void BM1366_set_job_difficulty_mask(int);
void BM1366_set_version_mask(uint32_t version_mask);
int BM1366_set_max_baud(void);
int BM1366_set_default_baud(void);
void BM1366_send_hash_frequency(float frequency);

1
components/asic/include/bm1368.h
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@@ -40,6 +40,7 @@ uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count);
uint8_t BM1368_send_init(void);
void BM1368_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);
void BM1368_set_job_difficulty_mask(int);
void BM1368_set_version_mask(uint32_t version_mask);
int BM1368_set_max_baud(void);
int BM1368_set_default_baud(void);
bool BM1368_send_hash_frequency(float frequency);

1
components/asic/include/bm1370.h
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@@ -41,6 +41,7 @@ uint8_t BM1370_init(uint64_t frequency, uint16_t asic_count);
uint8_t BM1370_send_init(void);
void BM1370_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);
void BM1370_set_job_difficulty_mask(int);
void BM1370_set_version_mask(uint32_t version_mask);
int BM1370_set_max_baud(void);
int BM1370_set_default_baud(void);
void BM1370_send_hash_frequency(int, float, float);

1
components/asic/include/bm1397.h
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@@ -53,6 +53,7 @@ uint8_t BM1397_init(uint64_t frequency, uint16_t asic_count);
void BM1397_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);
void BM1397_set_job_difficulty_mask(int);
void BM1397_set_version_mask(uint32_t version_mask);
int BM1397_set_max_baud(void);
int BM1397_set_default_baud(void);
void BM1397_send_hash_frequency(float frequency);