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e5c317fb97
* Accept and store float frequency values * Unify PLL resolver for 1366/1368/1370 Pick the closest frequency to the requested target. If there are multiple PLL settings, pick the one with first the lowest VDO frequency, and finally the lowest posdividers. Merged frequency ramp start and loop. This solves overshooting when requesting a target frequency within the current step size. It also eliminates the duplicate setting of the target frequency is that's on a step boundary. Cleaned up several unused defines. * Restore postdiv2 < postdiv1 condition for BM1368 and BM1370 * Whitespace * Clean up intermediate functions Simplify frequency_transition further, finally fix overshoot * Code cleanup * Add debug logging for BM1397 * Fix log * Flip postdiv condition for readability * Add test * Fix BM1370 fb_range * EOF line in test_pll.c