mirror of
https://github.com/skot/ESP-Miner.git
synced 2025-03-26 09:41:43 +01:00
a5842a54b3
* Verify CHIP_ID response Fixes #740 * Log warning on CHIP_ID mismatch * Fix CHIP_ID checksum calculation * On BM1397, CORE_NUM should be 0x18 * CORE_NUM and ADDR log only and early exit when no chips are detected * Fix compile error * Refactored out duplicated code Moved count_asic_chips and receive_work functions to common.c Moved asic_response_buffer to local scope Unified preamble and crc check on serial rx Fixed typo in proccess_work Moved CRC5_MASK define to proper location * Change receive_work read timeout log to debug * Changed wrong log to debug * Fix merge * Fix length check for bm1397 * add ASIC TX dubugging on BM1397 (crap, does this fix the ticket mask?!) --------- Co-authored-by: Skot <skot@bitnet.cx>
264 lines
10 KiB
C
264 lines
10 KiB
C
#include <string.h>
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#include <esp_log.h>
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#include "bm1397.h"
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#include "bm1366.h"
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#include "bm1368.h"
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#include "bm1370.h"
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#include "asic.h"
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static const double NONCE_SPACE = 4294967296.0; // 2^32
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static const char *TAG = "asic";
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// .init_fn = BM1366_init,
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uint8_t ASIC_init(GlobalState * GLOBAL_STATE) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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return BM1397_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, BITAXE_MAX_ASIC_COUNT);
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case DEVICE_ULTRA:
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return BM1366_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, BITAXE_ULTRA_ASIC_COUNT);
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case DEVICE_SUPRA:
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return BM1368_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, BITAXE_SUPRA_ASIC_COUNT);
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case DEVICE_GAMMA:
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return BM1370_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, BITAXE_GAMMA_ASIC_COUNT);
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case DEVICE_GAMMATURBO:
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return BM1370_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, BITAXE_GAMMATURBO_ASIC_COUNT);
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default:
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}
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return ESP_OK;
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}
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uint8_t ASIC_get_asic_count(GlobalState * GLOBAL_STATE) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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return BITAXE_MAX_ASIC_COUNT;
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case DEVICE_ULTRA:
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return BITAXE_ULTRA_ASIC_COUNT;
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case DEVICE_SUPRA:
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return BITAXE_SUPRA_ASIC_COUNT;
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case DEVICE_GAMMA:
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return BITAXE_GAMMA_ASIC_COUNT;
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case DEVICE_GAMMATURBO:
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return BITAXE_GAMMATURBO_ASIC_COUNT;
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default:
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}
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return 0;
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}
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uint16_t ASIC_get_small_core_count(GlobalState * GLOBAL_STATE) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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return BM1397_SMALL_CORE_COUNT;
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case DEVICE_ULTRA:
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return BM1366_SMALL_CORE_COUNT;
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case DEVICE_SUPRA:
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return BM1368_SMALL_CORE_COUNT;
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case DEVICE_GAMMA:
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return BM1370_SMALL_CORE_COUNT;
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case DEVICE_GAMMATURBO:
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return BM1370_SMALL_CORE_COUNT;
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default:
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}
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return 0;
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}
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// .receive_result_fn = BM1366_process_work,
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task_result * ASIC_process_work(GlobalState * GLOBAL_STATE) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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return BM1397_process_work(GLOBAL_STATE);
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case DEVICE_ULTRA:
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return BM1366_process_work(GLOBAL_STATE);
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case DEVICE_SUPRA:
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return BM1368_process_work(GLOBAL_STATE);
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case DEVICE_GAMMA:
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case DEVICE_GAMMATURBO:
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return BM1370_process_work(GLOBAL_STATE);
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default:
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}
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return NULL;
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}
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// .set_max_baud_fn = BM1366_set_max_baud,
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int ASIC_set_max_baud(GlobalState * GLOBAL_STATE) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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return BM1397_set_max_baud();
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case DEVICE_ULTRA:
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return BM1366_set_max_baud();
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case DEVICE_SUPRA:
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return BM1368_set_max_baud();
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case DEVICE_GAMMA:
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case DEVICE_GAMMATURBO:
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return BM1370_set_max_baud();
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default:
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return 0;
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}
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}
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// .set_difficulty_mask_fn = BM1366_set_job_difficulty_mask,
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void ASIC_set_job_difficulty_mask(GlobalState * GLOBAL_STATE, uint8_t mask) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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BM1397_set_job_difficulty_mask(mask);
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break;
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case DEVICE_ULTRA:
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BM1366_set_job_difficulty_mask(mask);
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break;
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case DEVICE_SUPRA:
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BM1368_set_job_difficulty_mask(mask);
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break;
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case DEVICE_GAMMA:
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case DEVICE_GAMMATURBO:
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BM1370_set_job_difficulty_mask(mask);
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break;
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default:
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}
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}
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// .send_work_fn = BM1366_send_work,
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void ASIC_send_work(GlobalState * GLOBAL_STATE, void * next_job) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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BM1397_send_work(GLOBAL_STATE, next_job);
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break;
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case DEVICE_ULTRA:
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BM1366_send_work(GLOBAL_STATE, next_job);
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break;
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case DEVICE_SUPRA:
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BM1368_send_work(GLOBAL_STATE, next_job);
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break;
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case DEVICE_GAMMA:
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case DEVICE_GAMMATURBO:
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BM1370_send_work(GLOBAL_STATE, next_job);
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break;
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default:
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return;
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}
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}
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// .set_version_mask = BM1366_set_version_mask
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void ASIC_set_version_mask(GlobalState * GLOBAL_STATE, uint32_t mask) {
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switch (GLOBAL_STATE->device_model) {
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case DEVICE_MAX:
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BM1397_set_version_mask(mask);
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break;
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case DEVICE_ULTRA:
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BM1366_set_version_mask(mask);
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break;
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case DEVICE_SUPRA:
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BM1368_set_version_mask(mask);
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break;
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case DEVICE_GAMMA:
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case DEVICE_GAMMATURBO:
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BM1370_set_version_mask(mask);
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break;
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default:
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return;
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}
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}
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bool ASIC_set_frequency(GlobalState * GLOBAL_STATE, float target_frequency) {
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ESP_LOGI(TAG, "Setting ASIC frequency to %.2f MHz", target_frequency);
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bool success = false;
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switch (GLOBAL_STATE->asic_model) {
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case ASIC_BM1366:
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success = BM1366_set_frequency(target_frequency);
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break;
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case ASIC_BM1368:
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success = BM1368_set_frequency(target_frequency);
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break;
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case ASIC_BM1370:
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success = BM1370_set_frequency(target_frequency);
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break;
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case ASIC_BM1397:
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// BM1397 doesn't have a set_frequency function yet
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ESP_LOGE(TAG, "Frequency transition not implemented for BM1397");
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success = false;
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break;
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default:
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ESP_LOGE(TAG, "Unknown ASIC model, cannot set frequency");
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success = false;
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break;
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}
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if (success) {
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ESP_LOGI(TAG, "Successfully transitioned to new ASIC frequency: %.2f MHz", target_frequency);
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} else {
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ESP_LOGE(TAG, "Failed to transition to new ASIC frequency: %.2f MHz", target_frequency);
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}
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return success;
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}
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esp_err_t ASIC_set_device_model(GlobalState * GLOBAL_STATE) {
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if (GLOBAL_STATE->device_model_str == NULL) {
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ESP_LOGE(TAG, "No device model string found");
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return ESP_FAIL;
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}
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if (strcmp(GLOBAL_STATE->device_model_str, "max") == 0) {
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GLOBAL_STATE->asic_model = ASIC_BM1397;
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GLOBAL_STATE->valid_model = true;
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GLOBAL_STATE->asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value * BM1397_SMALL_CORE_COUNT * 1000)) / (double) ASIC_get_asic_count(GLOBAL_STATE); // no version-rolling so same Nonce Space is splitted between Small Cores
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GLOBAL_STATE->ASIC_difficulty = BM1397_ASIC_DIFFICULTY;
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ESP_LOGI(TAG, "DEVICE: bitaxeMax");
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ESP_LOGI(TAG, "ASIC: %dx BM1397 (%" PRIu64 " cores)", BITAXE_MAX_ASIC_COUNT, BM1397_CORE_COUNT);
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GLOBAL_STATE->device_model = DEVICE_MAX;
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} else if (strcmp(GLOBAL_STATE->device_model_str, "ultra") == 0) {
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GLOBAL_STATE->asic_model = ASIC_BM1366;
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GLOBAL_STATE->valid_model = true;
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//GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1366_CORE_COUNT * 1000)) / (double) BITAXE_ULTRA_ASIC_COUNT; // version-rolling so Small Cores have different Nonce Space
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GLOBAL_STATE->asic_job_frequency_ms = 2000; //ms
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GLOBAL_STATE->ASIC_difficulty = BM1366_ASIC_DIFFICULTY;
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ESP_LOGI(TAG, "DEVICE: bitaxeUltra");
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ESP_LOGI(TAG, "ASIC: %dx BM1366 (%" PRIu64 " cores)", BITAXE_ULTRA_ASIC_COUNT, BM1366_CORE_COUNT);
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GLOBAL_STATE->device_model = DEVICE_ULTRA;
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} else if (strcmp(GLOBAL_STATE->device_model_str, "supra") == 0) {
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GLOBAL_STATE->asic_model = ASIC_BM1368;
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GLOBAL_STATE->valid_model = true;
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//GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1368_CORE_COUNT * 1000)) / (double) BITAXE_SUPRA_ASIC_COUNT; // version-rolling so Small Cores have different Nonce Space
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GLOBAL_STATE->asic_job_frequency_ms = 500; //ms
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GLOBAL_STATE->ASIC_difficulty = BM1368_ASIC_DIFFICULTY;
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ESP_LOGI(TAG, "DEVICE: bitaxeSupra");
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ESP_LOGI(TAG, "ASIC: %dx BM1368 (%" PRIu64 " cores)", BITAXE_SUPRA_ASIC_COUNT, BM1368_CORE_COUNT);
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GLOBAL_STATE->device_model = DEVICE_SUPRA;
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} else if (strcmp(GLOBAL_STATE->device_model_str, "gamma") == 0) {
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GLOBAL_STATE->asic_model = ASIC_BM1370;
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GLOBAL_STATE->valid_model = true;
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//GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1370_CORE_COUNT * 1000)) / (double) BITAXE_GAMMA_ASIC_COUNT; // version-rolling so Small Cores have different Nonce Space
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GLOBAL_STATE->asic_job_frequency_ms = 500; //ms
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GLOBAL_STATE->ASIC_difficulty = BM1370_ASIC_DIFFICULTY;
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ESP_LOGI(TAG, "DEVICE: bitaxeGamma");
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ESP_LOGI(TAG, "ASIC: %dx BM1370 (%" PRIu64 " cores)", BITAXE_GAMMA_ASIC_COUNT, BM1370_CORE_COUNT);
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GLOBAL_STATE->device_model = DEVICE_GAMMA;
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} else if (strcmp(GLOBAL_STATE->device_model_str, "gammaturbo") == 0) {
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GLOBAL_STATE->asic_model = ASIC_BM1370;
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GLOBAL_STATE->valid_model = true;
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//GLOBAL_STATE.asic_job_frequency_ms = (NONCE_SPACE / (double) (GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1370_CORE_COUNT * 1000)) / (double) BITAXE_GAMMATURBO_ASIC_COUNT; // version-rolling so Small Cores have different Nonce Space
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GLOBAL_STATE->asic_job_frequency_ms = 500; //ms
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GLOBAL_STATE->ASIC_difficulty = BM1370_ASIC_DIFFICULTY;
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ESP_LOGI(TAG, "DEVICE: bitaxeGammaTurbo");
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ESP_LOGI(TAG, "ASIC: %dx BM1370 (%" PRIu64 " cores)", BITAXE_GAMMATURBO_ASIC_COUNT, BM1370_CORE_COUNT);
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GLOBAL_STATE->device_model = DEVICE_GAMMATURBO;
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} else {
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ESP_LOGE(TAG, "Invalid DEVICE model");
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// maybe should return here to now execute anything with a faulty device parameter !
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// this stops crashes/reboots and allows dev testing without an asic
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GLOBAL_STATE->device_model = DEVICE_UNKNOWN;
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GLOBAL_STATE->valid_model = false;
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return ESP_FAIL;
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}
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return ESP_OK;
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}
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