dsputil: use cpuflags in x86 emu_edge_core
avoids passing around the extra argument among all the macros it uses
This commit is contained in:
Justin Ruggles
parent
395f2e70dd
commit
0e8fdd41c2
@ -497,14 +497,14 @@ cglobal scalarproduct_float_sse, 3,3,2, v1, v2, offset
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; ... and then the same for left/right extend also. See below for loop
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; function implementations. Fast are fixed-width, slow is variable-width
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%macro EMU_EDGE_FUNC 1
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%macro EMU_EDGE_FUNC 0
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%ifdef ARCH_X86_64
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%define w_reg r10
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cglobal emu_edge_core_%1, 6, 7, 1
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cglobal emu_edge_core, 6, 7, 1
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mov r11, r5 ; save block_h
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%else
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%define w_reg r6
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cglobal emu_edge_core_%1, 2, 7, 0
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cglobal emu_edge_core, 2, 7, 0
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mov r4, r4m ; end_y
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mov r5, r5m ; block_h
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%endif
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@ -630,18 +630,18 @@ cglobal emu_edge_core_%1, 2, 7, 0
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; - if (%2 & 3 == 3) fills 2 bytes into r6, and 1 into ebx
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; - else fills remaining bytes into ebx
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; writing data out is in the same way
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%macro READ_NUM_BYTES 3
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%macro READ_NUM_BYTES 2
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%assign %%src_off 0 ; offset in source buffer
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%assign %%smidx 0 ; mmx register idx
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%assign %%sxidx 0 ; xmm register idx
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%ifnidn %3, mmx
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%if cpuflag(sse)
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%rep %2/16
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movups xmm %+ %%sxidx, [r1+%%src_off]
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%assign %%src_off %%src_off+16
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%assign %%sxidx %%sxidx+1
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%endrep ; %2/16
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%endif ; !mmx
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%endif
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%ifdef ARCH_X86_64
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%if (%2-%%src_off) == 8
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@ -679,12 +679,12 @@ cglobal emu_edge_core_%1, 2, 7, 0
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%endif ; (%2-%%src_off) == 1/2/3
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%endmacro ; READ_NUM_BYTES
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%macro WRITE_NUM_BYTES 3
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%macro WRITE_NUM_BYTES 2
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%assign %%dst_off 0 ; offset in destination buffer
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%assign %%dmidx 0 ; mmx register idx
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%assign %%dxidx 0 ; xmm register idx
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%ifnidn %3, mmx
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%if cpuflag(sse)
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%rep %2/16
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movups [r0+%%dst_off], xmm %+ %%dxidx
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%assign %%dst_off %%dst_off+16
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@ -734,7 +734,7 @@ cglobal emu_edge_core_%1, 2, 7, 0
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; those out into the destination buffer
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; r0=buf,r1=src,r2=linesize,r3(64)/r3m(32)=start_x,r4=end_y,r5=block_h
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; r6(eax/64)/r3(ebx/32)=val_reg
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%macro VERTICAL_EXTEND 1
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%macro VERTICAL_EXTEND 0
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%assign %%n 1
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%rep 22
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ALIGN 128
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@ -747,9 +747,9 @@ ALIGN 128
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cmp dword r3m, 0
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je .emuedge_copy_body_ %+ %%n %+ _loop
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%endif ; ARCH_X86_64/32
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READ_NUM_BYTES top, %%n, %1 ; read bytes
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READ_NUM_BYTES top, %%n ; read bytes
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.emuedge_extend_top_ %+ %%n %+ _loop: ; do {
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WRITE_NUM_BYTES top, %%n, %1 ; write bytes
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WRITE_NUM_BYTES top, %%n ; write bytes
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add r0 , r2 ; dst += linesize
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%ifdef ARCH_X86_64
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dec r3d
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@ -760,8 +760,8 @@ ALIGN 128
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; copy body pixels
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.emuedge_copy_body_ %+ %%n %+ _loop: ; do {
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READ_NUM_BYTES body, %%n, %1 ; read bytes
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WRITE_NUM_BYTES body, %%n, %1 ; write bytes
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READ_NUM_BYTES body, %%n ; read bytes
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WRITE_NUM_BYTES body, %%n ; write bytes
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add r0 , r2 ; dst += linesize
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add r1 , r2 ; src += linesize
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dec r4d
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@ -771,9 +771,9 @@ ALIGN 128
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test r5 , r5 ; if (!block_h)
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jz .emuedge_v_extend_end_ %+ %%n ; goto end
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sub r1 , r2 ; src -= linesize
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READ_NUM_BYTES bottom, %%n, %1 ; read bytes
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READ_NUM_BYTES bottom, %%n ; read bytes
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.emuedge_extend_bottom_ %+ %%n %+ _loop: ; do {
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WRITE_NUM_BYTES bottom, %%n, %1 ; write bytes
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WRITE_NUM_BYTES bottom, %%n ; write bytes
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add r0 , r2 ; dst += linesize
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dec r5d
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jnz .emuedge_extend_bottom_ %+ %%n %+ _loop ; } while (--block_h)
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@ -796,17 +796,17 @@ ALIGN 128
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; lowest two bytes of the register (so val*0x0101), and are splatted
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; into each byte of mm0 as well if n_pixels >= 8
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%macro READ_V_PIXEL 3
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%macro READ_V_PIXEL 2
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mov vall, %2
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mov valh, vall
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%if %1 >= 8
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movd mm0, vald
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%ifidn %3, mmx
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%if cpuflag(mmx2)
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pshufw mm0, mm0, 0
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%else ; mmx
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punpcklwd mm0, mm0
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punpckldq mm0, mm0
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%else ; !mmx
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pshufw mm0, mm0, 0
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%endif ; mmx
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%endif ; sse
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%endif ; %1 >= 8
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%endmacro
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@ -831,13 +831,13 @@ ALIGN 128
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%endmacro
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; r0=buf+block_h*linesize, r1=start_x, r2=linesize, r5=block_h, r6/r3=val
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%macro LEFT_EXTEND 1
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%macro LEFT_EXTEND 0
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%assign %%n 2
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%rep 11
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ALIGN 64
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.emuedge_extend_left_ %+ %%n: ; do {
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sub r0, r2 ; dst -= linesize
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READ_V_PIXEL %%n, [r0+r1], %1 ; read pixels
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READ_V_PIXEL %%n, [r0+r1] ; read pixels
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WRITE_V_PIXEL %%n, r0 ; write pixels
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dec r5
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jnz .emuedge_extend_left_ %+ %%n ; } while (--block_h)
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@ -851,19 +851,19 @@ ALIGN 64
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%endmacro ; LEFT_EXTEND
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; r3/r0=buf+block_h*linesize, r2=linesize, r11/r5=block_h, r0/r6=end_x, r6/r3=val
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%macro RIGHT_EXTEND 1
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%macro RIGHT_EXTEND 0
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%assign %%n 2
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%rep 11
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ALIGN 64
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.emuedge_extend_right_ %+ %%n: ; do {
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%ifdef ARCH_X86_64
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sub r3, r2 ; dst -= linesize
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READ_V_PIXEL %%n, [r3+w_reg-1], %1 ; read pixels
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READ_V_PIXEL %%n, [r3+w_reg-1] ; read pixels
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WRITE_V_PIXEL %%n, r3+r4-%%n ; write pixels
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dec r11
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%else ; ARCH_X86_32
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sub r0, r2 ; dst -= linesize
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READ_V_PIXEL %%n, [r0+w_reg-1], %1 ; read pixels
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READ_V_PIXEL %%n, [r0+w_reg-1] ; read pixels
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WRITE_V_PIXEL %%n, r0+r4-%%n ; write pixels
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dec r5
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%endif ; ARCH_X86_64/32
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@ -905,16 +905,16 @@ ALIGN 64
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.%1_skip_%4_px:
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%endmacro
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%macro V_COPY_ROW 3
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%macro V_COPY_ROW 2
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%ifidn %1, bottom
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sub r1, linesize
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%endif
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.%1_copy_loop:
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xor cnt_reg, cnt_reg
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%ifidn %3, mmx
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%if notcpuflag(sse)
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%define linesize r2m
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V_COPY_NPX %1, mm0, movq, 8, 0xFFFFFFF8
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%else ; !mmx
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%else ; sse
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V_COPY_NPX %1, xmm0, movups, 16, 0xFFFFFFF0
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%ifdef ARCH_X86_64
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%define linesize r2
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@ -923,7 +923,7 @@ ALIGN 64
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%define linesize r2m
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V_COPY_NPX %1, mm0, movq, 8
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%endif ; ARCH_X86_64/32
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%endif ; mmx
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%endif ; sse
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V_COPY_NPX %1, vald, mov, 4
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V_COPY_NPX %1, valw, mov, 2
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V_COPY_NPX %1, vall, mov, 1
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@ -936,7 +936,7 @@ ALIGN 64
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jnz .%1_copy_loop
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%endmacro
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%macro SLOW_V_EXTEND 1
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%macro SLOW_V_EXTEND 0
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.slow_v_extend_loop:
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; r0=buf,r1=src,r2(64)/r2m(32)=linesize,r3(64)/r3m(32)=start_x,r4=end_y,r5=block_h
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; r11(64)/r3(later-64)/r2(32)=cnt_reg,r6(64)/r3(32)=val_reg,r10(64)/r6(32)=w=end_x-start_x
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@ -945,16 +945,16 @@ ALIGN 64
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test r3, r3
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%define cnt_reg r11
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jz .do_body_copy ; if (!start_y) goto do_body_copy
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V_COPY_ROW top, r3, %1
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V_COPY_ROW top, r3
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%else
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cmp dword r3m, 0
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%define cnt_reg r2
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je .do_body_copy ; if (!start_y) goto do_body_copy
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V_COPY_ROW top, dword r3m, %1
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V_COPY_ROW top, dword r3m
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%endif
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.do_body_copy:
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V_COPY_ROW body, r4, %1
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V_COPY_ROW body, r4
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%ifdef ARCH_X86_64
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pop r11 ; restore old value of block_h
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@ -966,7 +966,7 @@ ALIGN 64
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%else
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jz .skip_bottom_extend
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%endif
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V_COPY_ROW bottom, r5, %1
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V_COPY_ROW bottom, r5
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%ifdef ARCH_X86_32
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.skip_bottom_extend:
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mov r2, r2m
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@ -974,12 +974,12 @@ ALIGN 64
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jmp .v_extend_end
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%endmacro
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%macro SLOW_LEFT_EXTEND 1
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%macro SLOW_LEFT_EXTEND 0
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.slow_left_extend_loop:
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; r0=buf+block_h*linesize,r2=linesize,r6(64)/r3(32)=val,r5=block_h,r4=cntr,r10/r6=start_x
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mov r4, 8
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sub r0, linesize
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READ_V_PIXEL 8, [r0+w_reg], %1
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READ_V_PIXEL 8, [r0+w_reg]
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.left_extend_8px_loop:
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movq [r0+r4-8], mm0
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add r4, 8
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@ -1002,7 +1002,7 @@ ALIGN 64
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jmp .right_extend
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%endmacro
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%macro SLOW_RIGHT_EXTEND 1
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%macro SLOW_RIGHT_EXTEND 0
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.slow_right_extend_loop:
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; r3(64)/r0(32)=buf+block_h*linesize,r2=linesize,r4=block_w,r11(64)/r5(32)=block_h,
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; r10(64)/r6(32)=end_x,r6/r3=val,r1=cntr
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@ -1015,7 +1015,7 @@ ALIGN 64
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%endif
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lea r1, [r4-8]
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sub buf_reg, linesize
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READ_V_PIXEL 8, [buf_reg+w_reg-1], %1
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READ_V_PIXEL 8, [buf_reg+w_reg-1]
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.right_extend_8px_loop:
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movq [buf_reg+r1], mm0
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sub r1, 8
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@ -1036,13 +1036,14 @@ ALIGN 64
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%endmacro
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%macro emu_edge 1
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EMU_EDGE_FUNC %1
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VERTICAL_EXTEND %1
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LEFT_EXTEND %1
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RIGHT_EXTEND %1
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SLOW_V_EXTEND %1
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SLOW_LEFT_EXTEND %1
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SLOW_RIGHT_EXTEND %1
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INIT_XMM %1
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EMU_EDGE_FUNC
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VERTICAL_EXTEND
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LEFT_EXTEND
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RIGHT_EXTEND
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SLOW_V_EXTEND
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SLOW_LEFT_EXTEND
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SLOW_RIGHT_EXTEND
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%endmacro
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emu_edge sse
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