lavc/bswapdsp: purge RISC-V V bswap32
This cannot beat the Zbb implementation, and it is unlikely that a real meaningful CPU design would support V and not Zbb. The best loop rewrite that I could come up with (4 shifts, 2 ands, 3 ors) is still ~40% slower than Zbb. A proper faster vector implementation should be feasible with the cryptographic vector extensions, but that is a story for another time.
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@@ -26,7 +26,6 @@
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#include "libavcodec/bswapdsp.h"
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#include "libavcodec/bswapdsp.h"
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void ff_bswap32_buf_rvb(uint32_t *dst, const uint32_t *src, int len);
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void ff_bswap32_buf_rvb(uint32_t *dst, const uint32_t *src, int len);
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void ff_bswap32_buf_rvv(uint32_t *dst, const uint32_t *src, int len);
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void ff_bswap16_buf_rvv(uint16_t *dst, const uint16_t *src, int len);
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void ff_bswap16_buf_rvv(uint16_t *dst, const uint16_t *src, int len);
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av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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@@ -39,10 +38,8 @@ av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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c->bswap_buf = ff_bswap32_buf_rvb;
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c->bswap_buf = ff_bswap32_buf_rvb;
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#endif
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#endif
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#if HAVE_RVV
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#if HAVE_RVV
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if (flags & AV_CPU_FLAG_RVV_I32) {
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if (flags & AV_CPU_FLAG_RVV_I32)
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c->bswap_buf = ff_bswap32_buf_rvv;
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c->bswap16_buf = ff_bswap16_buf_rvv;
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c->bswap16_buf = ff_bswap16_buf_rvv;
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}
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#endif
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#endif
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}
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}
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}
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}
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@@ -21,29 +21,6 @@
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#include "config.h"
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#include "config.h"
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#include "libavutil/riscv/asm.S"
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#include "libavutil/riscv/asm.S"
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func ff_bswap32_buf_rvv, zve32x
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li t4, 4
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addi t1, a0, 1
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addi t2, a0, 2
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addi t3, a0, 3
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1:
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vsetvli t0, a2, e8, m1, ta, ma
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vlseg4e8.v v8, (a1)
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sub a2, a2, t0
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sh2add a1, t0, a1
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vsse8.v v8, (t3), t4
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sh2add t3, t0, t3
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vsse8.v v9, (t2), t4
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sh2add t2, t0, t2
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vsse8.v v10, (t1), t4
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sh2add t1, t0, t1
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vsse8.v v11, (a0), t4
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sh2add a0, t0, a0
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bnez a2, 1b
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ret
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endfunc
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func ff_bswap16_buf_rvv, zve32x
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func ff_bswap16_buf_rvv, zve32x
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1:
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1:
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vsetvli t0, a2, e16, m8, ta, ma
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vsetvli t0, a2, e16, m8, ta, ma
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