x86/dsputilenc: port sum_abs_dctelem functions to yasm
Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
James Almer
Michael Niedermayer
parent
ddeb58b90c
commit
61eea421b2
@ -487,3 +487,45 @@ cglobal pix_norm1, 2, 4
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movd eax, m1
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movd eax, m1
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RET
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RET
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%macro DCT_SAD4 1
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mova m2, [blockq+%1+0 ]
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mova m3, [blockq+%1+16]
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mova m4, [blockq+%1+32]
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mova m5, [blockq+%1+48]
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ABS1_SUM m2, m6, m0
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ABS1_SUM m3, m6, m1
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ABS1_SUM m4, m6, m0
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ABS1_SUM m5, m6, m1
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%endmacro
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;-----------------------------------------------
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;int ff_sum_abs_dctelem(int16_t *block)
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;-----------------------------------------------
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; %1 = number of xmm registers used
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%macro SUM_ABS_DCTELEM 1
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cglobal sum_abs_dctelem, 1, 1, %1, block
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pxor m0, m0
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pxor m1, m1
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DCT_SAD4 0
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%if mmsize == 8
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DCT_SAD4 8
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%endif
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DCT_SAD4 64
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%if mmsize == 8
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DCT_SAD4 72
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%endif
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paddusw m0, m1
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HSUM m0, m1, eax
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and eax, 0xFFFF
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RET
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%endmacro
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INIT_MMX mmx
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SUM_ABS_DCTELEM 0
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INIT_MMX mmxext
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SUM_ABS_DCTELEM 0
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INIT_XMM sse2
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SUM_ABS_DCTELEM 7
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INIT_XMM ssse3
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SUM_ABS_DCTELEM 6
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@ -38,6 +38,10 @@ void ff_diff_pixels_mmx(int16_t *block, const uint8_t *s1, const uint8_t *s2,
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int stride);
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int stride);
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int ff_pix_sum16_mmx(uint8_t *pix, int line_size);
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int ff_pix_sum16_mmx(uint8_t *pix, int line_size);
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int ff_pix_norm1_mmx(uint8_t *pix, int line_size);
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int ff_pix_norm1_mmx(uint8_t *pix, int line_size);
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int ff_sum_abs_dctelem_mmx(int16_t *block);
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int ff_sum_abs_dctelem_mmxext(int16_t *block);
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int ff_sum_abs_dctelem_sse2(int16_t *block);
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int ff_sum_abs_dctelem_ssse3(int16_t *block);
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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@ -759,118 +763,6 @@ static void sub_hfyu_median_prediction_mmxext(uint8_t *dst, const uint8_t *src1,
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*left = src2[w - 1];
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*left = src2[w - 1];
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}
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}
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#define MMABS_MMX(a,z) \
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"pxor " #z ", " #z " \n\t" \
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"pcmpgtw " #a ", " #z " \n\t" \
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"pxor " #z ", " #a " \n\t" \
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"psubw " #z ", " #a " \n\t"
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#define MMABS_MMXEXT(a, z) \
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"pxor " #z ", " #z " \n\t" \
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"psubw " #a ", " #z " \n\t" \
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"pmaxsw " #z ", " #a " \n\t"
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#define MMABS_SSSE3(a,z) \
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"pabsw " #a ", " #a " \n\t"
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#define MMABS_SUM(a,z, sum) \
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MMABS(a,z) \
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"paddusw " #a ", " #sum " \n\t"
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/* FIXME: HSUM_* saturates at 64k, while an 8x8 hadamard or dct block can get
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* up to about 100k on extreme inputs. But that's very unlikely to occur in
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* natural video, and it's even more unlikely to not have any alternative
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* mvs/modes with lower cost. */
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#define HSUM_MMX(a, t, dst) \
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"movq " #a ", " #t " \n\t" \
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"psrlq $32, " #a " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"movq " #a ", " #t " \n\t" \
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"psrlq $16, " #a " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"movd " #a ", " #dst " \n\t" \
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#define HSUM_MMXEXT(a, t, dst) \
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"pshufw $0x0E, " #a ", " #t " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"pshufw $0x01, " #a ", " #t " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"movd " #a ", " #dst " \n\t" \
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#define HSUM_SSE2(a, t, dst) \
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"movhlps " #a ", " #t " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"pshuflw $0x0E, " #a ", " #t " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"pshuflw $0x01, " #a ", " #t " \n\t" \
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"paddusw " #t ", " #a " \n\t" \
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"movd " #a ", " #dst " \n\t" \
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#define DCT_SAD4(m, mm, o) \
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"mov"#m" "#o" + 0(%1), " #mm "2 \n\t" \
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"mov"#m" "#o" + 16(%1), " #mm "3 \n\t" \
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"mov"#m" "#o" + 32(%1), " #mm "4 \n\t" \
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"mov"#m" "#o" + 48(%1), " #mm "5 \n\t" \
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MMABS_SUM(mm ## 2, mm ## 6, mm ## 0) \
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MMABS_SUM(mm ## 3, mm ## 7, mm ## 1) \
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MMABS_SUM(mm ## 4, mm ## 6, mm ## 0) \
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MMABS_SUM(mm ## 5, mm ## 7, mm ## 1) \
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#define DCT_SAD_MMX \
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"pxor %%mm0, %%mm0 \n\t" \
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"pxor %%mm1, %%mm1 \n\t" \
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DCT_SAD4(q, %%mm, 0) \
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DCT_SAD4(q, %%mm, 8) \
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DCT_SAD4(q, %%mm, 64) \
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DCT_SAD4(q, %%mm, 72) \
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"paddusw %%mm1, %%mm0 \n\t" \
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HSUM(%%mm0, %%mm1, %0)
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#define DCT_SAD_SSE2 \
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"pxor %%xmm0, %%xmm0 \n\t" \
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"pxor %%xmm1, %%xmm1 \n\t" \
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DCT_SAD4(dqa, %%xmm, 0) \
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DCT_SAD4(dqa, %%xmm, 64) \
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"paddusw %%xmm1, %%xmm0 \n\t" \
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HSUM(%%xmm0, %%xmm1, %0)
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#define DCT_SAD_FUNC(cpu) \
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static int sum_abs_dctelem_ ## cpu(int16_t *block) \
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{ \
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int sum; \
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__asm__ volatile ( \
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DCT_SAD \
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:"=r"(sum) \
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:"r"(block)); \
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return sum & 0xFFFF; \
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}
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#define DCT_SAD DCT_SAD_MMX
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#define HSUM(a, t, dst) HSUM_MMX(a, t, dst)
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#define MMABS(a, z) MMABS_MMX(a, z)
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DCT_SAD_FUNC(mmx)
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#undef MMABS
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#undef HSUM
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#define HSUM(a, t, dst) HSUM_MMXEXT(a, t, dst)
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#define MMABS(a, z) MMABS_MMXEXT(a, z)
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DCT_SAD_FUNC(mmxext)
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#undef HSUM
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#undef DCT_SAD
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#define DCT_SAD DCT_SAD_SSE2
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#define HSUM(a, t, dst) HSUM_SSE2(a, t, dst)
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DCT_SAD_FUNC(sse2)
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#undef MMABS
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#if HAVE_SSSE3_INLINE
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#define MMABS(a, z) MMABS_SSSE3(a, z)
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DCT_SAD_FUNC(ssse3)
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#undef MMABS
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#endif
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#undef HSUM
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#undef DCT_SAD
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static int ssd_int8_vs_int16_mmx(const int8_t *pix1, const int16_t *pix2,
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static int ssd_int8_vs_int16_mmx(const int8_t *pix1, const int16_t *pix2,
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int size)
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int size)
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{
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{
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@ -1012,8 +904,6 @@ av_cold void ff_dsputilenc_init_mmx(DSPContext *c, AVCodecContext *avctx,
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c->fdct = ff_fdct_mmx;
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c->fdct = ff_fdct_mmx;
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c->diff_bytes = diff_bytes_mmx;
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c->diff_bytes = diff_bytes_mmx;
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c->sum_abs_dctelem = sum_abs_dctelem_mmx;
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c->sse[0] = sse16_mmx;
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c->sse[0] = sse16_mmx;
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c->sse[1] = sse8_mmx;
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c->sse[1] = sse8_mmx;
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c->vsad[4] = vsad_intra16_mmx;
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c->vsad[4] = vsad_intra16_mmx;
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@ -1041,7 +931,6 @@ av_cold void ff_dsputilenc_init_mmx(DSPContext *c, AVCodecContext *avctx,
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(dct_algo == FF_DCT_AUTO || dct_algo == FF_DCT_MMX))
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(dct_algo == FF_DCT_AUTO || dct_algo == FF_DCT_MMX))
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c->fdct = ff_fdct_mmxext;
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c->fdct = ff_fdct_mmxext;
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c->sum_abs_dctelem = sum_abs_dctelem_mmxext;
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c->vsad[4] = vsad_intra16_mmxext;
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c->vsad[4] = vsad_intra16_mmxext;
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if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
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if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
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@ -1055,8 +944,6 @@ av_cold void ff_dsputilenc_init_mmx(DSPContext *c, AVCodecContext *avctx,
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if (!high_bit_depth &&
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if (!high_bit_depth &&
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(dct_algo == FF_DCT_AUTO || dct_algo == FF_DCT_MMX))
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(dct_algo == FF_DCT_AUTO || dct_algo == FF_DCT_MMX))
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c->fdct = ff_fdct_sse2;
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c->fdct = ff_fdct_sse2;
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c->sum_abs_dctelem = sum_abs_dctelem_sse2;
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}
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}
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#if HAVE_SSSE3_INLINE
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#if HAVE_SSSE3_INLINE
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@ -1065,7 +952,6 @@ av_cold void ff_dsputilenc_init_mmx(DSPContext *c, AVCodecContext *avctx,
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c->try_8x8basis = try_8x8basis_ssse3;
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c->try_8x8basis = try_8x8basis_ssse3;
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}
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}
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c->add_8x8basis = add_8x8basis_ssse3;
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c->add_8x8basis = add_8x8basis_ssse3;
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c->sum_abs_dctelem = sum_abs_dctelem_ssse3;
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}
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}
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#endif
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#endif
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#endif /* HAVE_INLINE_ASM */
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#endif /* HAVE_INLINE_ASM */
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@ -1073,15 +959,18 @@ av_cold void ff_dsputilenc_init_mmx(DSPContext *c, AVCodecContext *avctx,
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if (EXTERNAL_MMX(cpu_flags)) {
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if (EXTERNAL_MMX(cpu_flags)) {
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c->hadamard8_diff[0] = ff_hadamard8_diff16_mmx;
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c->hadamard8_diff[0] = ff_hadamard8_diff16_mmx;
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c->hadamard8_diff[1] = ff_hadamard8_diff_mmx;
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c->hadamard8_diff[1] = ff_hadamard8_diff_mmx;
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c->sum_abs_dctelem = ff_sum_abs_dctelem_mmx;
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}
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}
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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c->hadamard8_diff[0] = ff_hadamard8_diff16_mmxext;
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c->hadamard8_diff[0] = ff_hadamard8_diff16_mmxext;
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c->hadamard8_diff[1] = ff_hadamard8_diff_mmxext;
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c->hadamard8_diff[1] = ff_hadamard8_diff_mmxext;
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c->sum_abs_dctelem = ff_sum_abs_dctelem_mmxext;
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}
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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if (EXTERNAL_SSE2(cpu_flags)) {
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c->sse[0] = ff_sse16_sse2;
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c->sse[0] = ff_sse16_sse2;
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c->sum_abs_dctelem = ff_sum_abs_dctelem_sse2;
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#if HAVE_ALIGNED_STACK
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#if HAVE_ALIGNED_STACK
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c->hadamard8_diff[0] = ff_hadamard8_diff16_sse2;
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c->hadamard8_diff[0] = ff_hadamard8_diff16_sse2;
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@ -1089,9 +978,12 @@ av_cold void ff_dsputilenc_init_mmx(DSPContext *c, AVCodecContext *avctx,
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#endif
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#endif
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}
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}
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if (EXTERNAL_SSSE3(cpu_flags) && HAVE_ALIGNED_STACK) {
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if (EXTERNAL_SSSE3(cpu_flags)) {
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c->sum_abs_dctelem = ff_sum_abs_dctelem_ssse3;
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#if HAVE_ALIGNED_STACK
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c->hadamard8_diff[0] = ff_hadamard8_diff16_ssse3;
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c->hadamard8_diff[0] = ff_hadamard8_diff16_ssse3;
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c->hadamard8_diff[1] = ff_hadamard8_diff_ssse3;
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c->hadamard8_diff[1] = ff_hadamard8_diff_ssse3;
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#endif
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}
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}
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ff_dsputil_init_pix_mmx(c, avctx);
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ff_dsputil_init_pix_mmx(c, avctx);
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