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ARM: remove check for PLD instruction

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PLD is present in ARMv5TE and later, which is checked for separately.

Signed-off-by: Mans Rullgard <mans@mansr.com>
This commit is contained in:
Mans Rullgard
2011-06-29 20:59:24 +01:00
parent 0291ce840c
commit a3e1f80e8b
2 changed files with 2 additions and 9 deletions
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4
configure vendored
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@@ -1093,7 +1093,6 @@ HAVE_LIST="
memalign memalign
mkstemp mkstemp
mmap mmap
pld
posix_memalign posix_memalign
round round
roundf roundf
@@ -2608,9 +2607,6 @@ EOF
warn "Compiler does not indicate floating-point ABI, guessing $fpabi." warn "Compiler does not indicate floating-point ABI, guessing $fpabi."
fi fi
# We have to check if pld is a nop and disable it.
check_asm pld '"pld [r0]"'
enabled armv5te && check_asm armv5te '"qadd r0, r0, r0"' enabled armv5te && check_asm armv5te '"qadd r0, r0, r0"'
enabled armv6 && check_asm armv6 '"sadd16 r0, r0, r0"' enabled armv6 && check_asm armv6 '"sadd16 r0, r0, r0"'
enabled armv6t2 && check_asm armv6t2 '"movt r0, #0"' enabled armv6t2 && check_asm armv6t2 '"movt r0, #0"'

7
libavcodec/arm/dsputil_arm.S
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@@ -24,11 +24,6 @@
preserve8 preserve8
#if !HAVE_PLD
.macro pld reg
.endm
#endif
#if HAVE_ARMV5TE #if HAVE_ARMV5TE
function ff_prefetch_arm, export=1 function ff_prefetch_arm, export=1
subs r2, r2, #1 subs r2, r2, #1
@@ -37,6 +32,8 @@ function ff_prefetch_arm, export=1
bne ff_prefetch_arm bne ff_prefetch_arm
bx lr bx lr
endfunc endfunc
#else
#define pld @
#endif #endif
.macro ALIGN_QWORD_D shift, Rd0, Rd1, Rd2, Rd3, Rn0, Rn1, Rn2, Rn3, Rn4 .macro ALIGN_QWORD_D shift, Rd0, Rd1, Rd2, Rd3, Rn0, Rn1, Rn2, Rn3, Rn4