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Merge pull request #206 from skot/multi-chip

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Multi chip support
This commit is contained in:
Georges 2024-06-10 10:14:41 +02:00 committed by GitHub
commit deb76ac058
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GPG Key ID: B5690EEEBB952194
17 changed files with 128 additions and 104 deletions
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56
components/bm1397/bm1366.c
View File

@ -399,7 +399,7 @@ static void do_frequency_ramp_up()
_send_simple(init793, 11);
}
static uint8_t _send_init(uint64_t frequency)
static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
{
// //send serial data
@ -418,8 +418,9 @@ static uint8_t _send_init(uint64_t frequency)
// unsigned char init3[6] = { 0x00, 0x18, 0xFF, 0x0F, 0xC1, 0x00 };
// _send_BM1366((TYPE_CMD | GROUP_ALL | CMD_WRITE), init3, 6, true);
// unsigned char init4[7] = { 0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03 };
// _send_simple(init4, 7);
// _send_chain_inactive();
// // unsigned char init4[7] = { 0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03 };
// // _send_simple(init4, 7);
// unsigned char init5[7] = { 0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C };
// _send_simple(init5, 7);
@ -454,7 +455,7 @@ static uint8_t _send_init(uint64_t frequency)
break;
}
}
ESP_LOGI(TAG, "%i chip(s) detected on the chain", chip_counter);
ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count);
unsigned char init4[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x00, 0x00, 0x03};
_send_simple(init4, 11);
@ -462,11 +463,17 @@ static uint8_t _send_init(uint64_t frequency)
unsigned char init5[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x18, 0xFF, 0x0F, 0xC1, 0x00, 0x00};
_send_simple(init5, 11);
unsigned char init6[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03};
_send_simple(init6, 7);
_send_chain_inactive();
// unsigned char init6[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03};
// _send_simple(init6, 7);
unsigned char init7[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C};
_send_simple(init7, 7);
// split the chip address space evenly
uint8_t address_interval = (uint8_t) (256 / chip_counter);
for (uint8_t i = 0; i < chip_counter; i++) {
_set_chip_address(i * address_interval);
// unsigned char init7[7] = { 0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C };
// _send_simple(init7, 7);
}
unsigned char init135[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x85, 0x40, 0x0C};
_send_simple(init135, 11);
@ -489,20 +496,18 @@ static uint8_t _send_init(uint64_t frequency)
unsigned char init173[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x28, 0x11, 0x30, 0x02, 0x00, 0x03};
_send_simple(init173, 11);
unsigned char init174[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x01, 0xF0, 0x15};
_send_simple(init174, 11);
unsigned char init175[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x18, 0xF0, 0x00, 0xC1, 0x00, 0x0C};
_send_simple(init175, 11);
unsigned char init176[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x85, 0x40, 0x04};
_send_simple(init176, 11);
unsigned char init177[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x80, 0x20, 0x11};
_send_simple(init177, 11);
unsigned char init178[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x82, 0xAA, 0x05};
_send_simple(init178, 11);
for (uint8_t i = 0; i < chip_counter; i++) {
unsigned char set_a8_register[6] = {i * address_interval, 0xA8, 0x00, 0x07, 0x01, 0xF0};
_send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, true);
unsigned char set_18_register[6] = {i * address_interval, 0x18, 0xF0, 0x00, 0xC1, 0x00};
_send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, true);
unsigned char set_3c_register_first[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x85, 0x40};
_send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, true);
unsigned char set_3c_register_second[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x80, 0x20};
_send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, true);
unsigned char set_3c_register_third[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x82, 0xAA};
_send_BM1366((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, true);
}
do_frequency_ramp_up();
@ -540,7 +545,7 @@ static void _send_read_address(void)
_send_BM1366((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false);
}
uint8_t BM1366_init(uint64_t frequency)
uint8_t BM1366_init(uint64_t frequency, uint16_t asic_count)
{
ESP_LOGI(TAG, "Initializing BM1366");
@ -552,10 +557,7 @@ uint8_t BM1366_init(uint64_t frequency)
// reset the bm1366
_reset();
// send the init command
//_send_read_address();
return _send_init(frequency);
return _send_init(frequency, asic_count);
}
// Baud formula = 25M/((denominator+1)*8)

62
components/bm1397/bm1368.c
View File

@ -266,7 +266,7 @@ static void do_frequency_ramp_up() {
}
}
static uint8_t _send_init(uint64_t frequency)
static uint8_t _send_init(uint64_t frequency, uint16_t asic_count)
{
//enable and set version rolling mask to 0xFFFF
@ -293,7 +293,7 @@ static uint8_t _send_init(uint64_t frequency)
break;
}
}
ESP_LOGI(TAG, "%i chip(s) detected on the chain", chip_counter);
ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count);
//enable and set version rolling mask to 0xFFFF (again)
unsigned char init4[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA4, 0x90, 0x00, 0xFF, 0xFF, 0x1C};
@ -308,12 +308,17 @@ static uint8_t _send_init(uint64_t frequency)
_send_simple(init6, 11);
//chain inactive
unsigned char init7[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03};
_send_simple(init7, 7);
_send_chain_inactive();
// unsigned char init7[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03};
// _send_simple(init7, 7);
//assign address 0x00 to the first chip
unsigned char init8[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C};
_send_simple(init8, 7);
// split the chip address space evenly
uint8_t address_interval = (uint8_t) (256 / chip_counter);
for (uint8_t i = 0; i < chip_counter; i++) {
_set_chip_address(i * address_interval);
// unsigned char init8[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C};
// _send_simple(init8, 7);
}
//Core Register Control
unsigned char init9[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x8B, 0x00, 0x12};
@ -336,25 +341,23 @@ static uint8_t _send_init(uint64_t frequency)
unsigned char init13[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x58, 0x02, 0x11, 0x11, 0x11, 0x06};
_send_simple(init13, 11);
//Reg_A8
unsigned char init14[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x01, 0xF0, 0x15};
_send_simple(init14, 11);
//Misc Control
unsigned char init15[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x18, 0xF0, 0x00, 0xC1, 0x00, 0x0C};
_send_simple(init15, 11);
//Core Register Control
unsigned char init16[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x8B, 0x00, 0x1A};
_send_simple(init16, 11);
//Core Register Control
unsigned char init17[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x80, 0x18, 0x17};
_send_simple(init17, 11);
//Core Register Control
unsigned char init18[11] = {0x55, 0xAA, 0x41, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x82, 0xAA, 0x05};
_send_simple(init18, 11);
for (uint8_t i = 0; i < chip_counter; i++) {
//Reg_A8
unsigned char set_a8_register[6] = {i * address_interval, 0xA8, 0x00, 0x07, 0x01, 0xF0};
_send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, true);
//Misc Control
unsigned char set_18_register[6] = {i * address_interval, 0x18, 0xF0, 0x00, 0xC1, 0x00};
_send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, true);
//Core Register Control
unsigned char set_3c_register_first[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x8B, 0x00};
_send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, true);
//Core Register Control
unsigned char set_3c_register_second[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x80, 0x18};
_send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, true);
//Core Register Control
unsigned char set_3c_register_third[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x82, 0xAA};
_send_BM1368((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, true);
}
do_frequency_ramp_up();
@ -386,7 +389,7 @@ static void _send_read_address(void)
_send_BM1368((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false);
}
uint8_t BM1368_init(uint64_t frequency)
uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count)
{
ESP_LOGI(TAG, "Initializing BM1368");
@ -398,10 +401,7 @@ uint8_t BM1368_init(uint64_t frequency)
// reset the bm1368
_reset();
// send the init command
//_send_read_address();
return _send_init(frequency);
return _send_init(frequency, asic_count);
}
// Baud formula = 25M/((denominator+1)*8)

41
components/bm1397/bm1397.c
View File

@ -104,6 +104,13 @@ static void _send_BM1397(uint8_t header, uint8_t *data, uint8_t data_len, bool d
free(buf);
}
static void _send_read_address(void)
{
unsigned char read_address[2] = {0x00, 0x00};
// send serial data
_send_BM1397((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false);
}
static void _send_chain_inactive(void)
{
@ -209,14 +216,29 @@ void BM1397_send_hash_frequency(float frequency)
ESP_LOGI(TAG, "Setting Frequency to %.2fMHz (%.2f)", frequency, newf);
}
static void _send_init(uint64_t frequency)
static void _send_init(uint64_t frequency, uint16_t asic_count)
{
// send the init command
_send_read_address();
int chip_counter = 0;
while (true) {
if (SERIAL_rx(asic_response_buffer, 11, 1000) > 0) {
chip_counter++;
} else {
break;
}
}
ESP_LOGI(TAG, "%i chip(s) detected on the chain, expected %i", chip_counter, asic_count);
// send serial data
vTaskDelay(SLEEP_TIME / portTICK_PERIOD_MS);
_send_chain_inactive();
_set_chip_address(0x00);
// split the chip address space evenly
for (uint8_t i = 0; i < asic_count; i++) {
_set_chip_address(i * (256 / asic_count));
}
unsigned char init[6] = {0x00, CLOCK_ORDER_CONTROL_0, 0x00, 0x00, 0x00, 0x00}; // init1 - clock_order_control0
_send_BM1397((TYPE_CMD | GROUP_ALL | CMD_WRITE), init, 6, false);
@ -258,15 +280,7 @@ static void _reset(void)
vTaskDelay(100 / portTICK_PERIOD_MS);
}
static void _send_read_address(void)
{
unsigned char read_address[2] = {0x00, 0x00};
// send serial data
_send_BM1397((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, false);
}
void BM1397_init(uint64_t frequency)
void BM1397_init(uint64_t frequency, uint16_t asic_count)
{
ESP_LOGI(TAG, "Initializing BM1397");
@ -278,10 +292,7 @@ void BM1397_init(uint64_t frequency)
// reset the bm1397
_reset();
// send the init command
_send_read_address();
_send_init(frequency);
_send_init(frequency, asic_count);
}
// Baud formula = 25M/((denominator+1)*8)

2
components/bm1397/include/bm1366.h
View File

@ -32,7 +32,7 @@ typedef struct __attribute__((__packed__))
uint8_t version[4];
} BM1366_job;
uint8_t BM1366_init(uint64_t frequency);
uint8_t BM1366_init(uint64_t frequency, uint16_t asic_count);
void BM1366_send_init(void);
void BM1366_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);

2
components/bm1397/include/bm1368.h
View File

@ -33,7 +33,7 @@ typedef struct __attribute__((__packed__))
uint8_t version[4];
} BM1368_job;
uint8_t BM1368_init(uint64_t frequency);
uint8_t BM1368_init(uint64_t frequency, uint16_t asic_count);
uint8_t BM1368_send_init(void);
void BM1368_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);

2
components/bm1397/include/bm1397.h
View File

@ -46,7 +46,7 @@ typedef struct __attribute__((__packed__))
uint8_t midstate3[32];
} job_packet;
void BM1397_init(uint64_t frequency);
void BM1397_init(uint64_t frequency, uint16_t asic_count);
void BM1397_send_work(void * GLOBAL_STATE, bm_job * next_bm_job);
void BM1397_set_job_difficulty_mask(int);

4
main/global_state.h
View File

@ -30,7 +30,7 @@ typedef enum
typedef struct
{
uint8_t (*init_fn)(uint64_t);
uint8_t (*init_fn)(uint64_t, uint16_t);
task_result * (*receive_result_fn)(void * GLOBAL_STATE);
int (*set_max_baud_fn)(void);
void (*set_difficulty_mask_fn)(int);
@ -43,6 +43,8 @@ typedef struct
char * device_model_str;
AsicModel asic_model;
char * asic_model_str;
uint16_t asic_count;
uint16_t voltage_domain;
AsicFunctions ASIC_functions;
double asic_job_frequency_ms;
uint32_t initial_ASIC_difficulty;

16
main/http_server/axe-os/src/app/components/home/home.component.ts
View File

@ -132,21 +132,7 @@ export class HomeComponent {
);
this.expectedHashRate$ = this.info$.pipe(map(info => {
if (info.ASICModel === eASICModel.BM1366) {
const version = parseInt(info.boardVersion);
if (version >= 400 && version < 500) {
return Math.floor(info.frequency * ((894 * 6) / 1000))
} else {
return Math.floor(info.frequency * (894 / 1000))
}
} else if (info.ASICModel === eASICModel.BM1397) {
return Math.floor(info.frequency * (672 / 1000))
} else if (info.ASICModel === eASICModel.BM1368) {
return Math.floor(info.frequency * (1276 / 1000))
}
return undefined;
return Math.floor(info.frequency * ((info.coreCount * info.asicCount) / 1000))
}))
this.quickLink$ = this.info$.pipe(

2
main/http_server/axe-os/src/app/services/system.service.ts
View File

@ -39,6 +39,8 @@ export class SystemService {
sharesAccepted: 1,
sharesRejected: 0,
uptimeSeconds: 38,
asicCount: 1,
coreCount: 672,
ASICModel: eASICModel.BM1366,
stratumURL: "public-pool.io",
stratumPort: 21496,

2
main/http_server/axe-os/src/models/ISystemInfo.ts
View File

@ -20,6 +20,8 @@ export interface ISystemInfo {
sharesAccepted: number,
sharesRejected: number,
uptimeSeconds: number,
asicCount: number,
coreCount: number,
ASICModel: eASICModel,
stratumURL: string,
stratumPort: number,

15
main/http_server/http_server.c
View File

@ -1,5 +1,4 @@
#include "http_server.h"
#include "adc.h"
#include "cJSON.h"
#include "esp_chip_info.h"
#include "esp_http_server.h"
@ -377,6 +376,20 @@ static esp_err_t GET_system_info(httpd_req_t * req)
cJSON_AddNumberToObject(root, "sharesAccepted", GLOBAL_STATE->SYSTEM_MODULE.shares_accepted);
cJSON_AddNumberToObject(root, "sharesRejected", GLOBAL_STATE->SYSTEM_MODULE.shares_rejected);
cJSON_AddNumberToObject(root, "uptimeSeconds", (esp_timer_get_time() - GLOBAL_STATE->SYSTEM_MODULE.start_time) / 1000000);
cJSON_AddNumberToObject(root, "asicCount", GLOBAL_STATE->asic_count);
uint16_t core_count = 0;
switch (GLOBAL_STATE->asic_model){
case ASIC_BM1397:
core_count = BM1397_CORE_COUNT;
break;
case ASIC_BM1366:
core_count = BM1366_CORE_COUNT;
break;
case ASIC_BM1368:
core_count = BM1368_CORE_COUNT;
break;
}
cJSON_AddNumberToObject(root, "coreCount", core_count);
cJSON_AddStringToObject(root, "ASICModel", GLOBAL_STATE->asic_model_str);
cJSON_AddStringToObject(root, "stratumURL", stratumURL);
cJSON_AddNumberToObject(root, "stratumPort", nvs_config_get_u16(NVS_CONFIG_STRATUM_PORT, CONFIG_STRATUM_PORT));

16
main/main.c
View File

@ -25,19 +25,25 @@ void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
ESP_LOGI(TAG, "NVS_CONFIG_ASIC_FREQ %f", (float) nvs_config_get_u16(NVS_CONFIG_ASIC_FREQ, CONFIG_ASIC_FREQUENCY));
GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value = nvs_config_get_u16(NVS_CONFIG_ASIC_FREQ, CONFIG_ASIC_FREQUENCY);
ESP_LOGI(TAG, "NVS_CONFIG_ASIC_FREQ %f", (float)GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value);
GLOBAL_STATE.device_model_str = nvs_config_get_string(NVS_CONFIG_DEVICE_MODEL, "");
if (strcmp(GLOBAL_STATE.device_model_str, "max") == 0) {
ESP_LOGI(TAG, "DEVICE: Max");
GLOBAL_STATE.device_model = DEVICE_MAX;
GLOBAL_STATE.asic_count = 1;
GLOBAL_STATE.voltage_domain = 1;
} else if (strcmp(GLOBAL_STATE.device_model_str, "ultra") == 0) {
ESP_LOGI(TAG, "DEVICE: Ultra");
GLOBAL_STATE.device_model = DEVICE_ULTRA;
GLOBAL_STATE.asic_count = 1;
GLOBAL_STATE.voltage_domain = 1;
} else if (strcmp(GLOBAL_STATE.device_model_str, "supra") == 0) {
ESP_LOGI(TAG, "DEVICE: Supra");
GLOBAL_STATE.device_model = DEVICE_SUPRA;
GLOBAL_STATE.asic_count = 1;
GLOBAL_STATE.voltage_domain = 1;
} else {
ESP_LOGE(TAG, "Invalid DEVICE model");
// maybe should return here to now execute anything with a faulty device parameter !
@ -52,7 +58,7 @@ void app_main(void)
.set_max_baud_fn = BM1366_set_max_baud,
.set_difficulty_mask_fn = BM1366_set_job_difficulty_mask,
.send_work_fn = BM1366_send_work};
GLOBAL_STATE.asic_job_frequency_ms = BM1366_FULLSCAN_MS;
GLOBAL_STATE.asic_job_frequency_ms = BM1366_FULLSCAN_MS / (double) GLOBAL_STATE.asic_count;
GLOBAL_STATE.initial_ASIC_difficulty = BM1366_INITIAL_DIFFICULTY;
GLOBAL_STATE.ASIC_functions = ASIC_functions;
@ -66,7 +72,7 @@ void app_main(void)
.send_work_fn = BM1368_send_work};
uint64_t bm1368_hashrate = GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1368_CORE_COUNT * 1000000;
GLOBAL_STATE.asic_job_frequency_ms = ((double) NONCE_SPACE / (double) bm1368_hashrate) * 1000;
GLOBAL_STATE.asic_job_frequency_ms = (((double) NONCE_SPACE / (double) bm1368_hashrate) * 1000) / (double) GLOBAL_STATE.asic_count;
GLOBAL_STATE.initial_ASIC_difficulty = BM1368_INITIAL_DIFFICULTY;
GLOBAL_STATE.ASIC_functions = ASIC_functions;
@ -80,7 +86,7 @@ void app_main(void)
.send_work_fn = BM1397_send_work};
uint64_t bm1397_hashrate = GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value * BM1397_CORE_COUNT * 1000000;
GLOBAL_STATE.asic_job_frequency_ms = ((double) NONCE_SPACE / (double) bm1397_hashrate) * 1000;
GLOBAL_STATE.asic_job_frequency_ms = (((double) NONCE_SPACE / (double) bm1397_hashrate) * 1000) / (double) GLOBAL_STATE.asic_count;
GLOBAL_STATE.initial_ASIC_difficulty = BM1397_INITIAL_DIFFICULTY;
GLOBAL_STATE.ASIC_functions = ASIC_functions;
@ -159,7 +165,7 @@ void app_main(void)
queue_init(&GLOBAL_STATE.ASIC_jobs_queue);
SERIAL_init();
(*GLOBAL_STATE.ASIC_functions.init_fn)(GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value);
(*GLOBAL_STATE.ASIC_functions.init_fn)(GLOBAL_STATE.POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE.asic_count);
SERIAL_set_baud((*GLOBAL_STATE.ASIC_functions.set_max_baud_fn)());
SERIAL_clear_buffer();

4
main/self_test/self_test.c
View File

@ -98,8 +98,8 @@ void self_test(void * pvParameters)
SERIAL_init();
uint8_t chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value);
ESP_LOGI(TAG, "%u chips detected", chips_detected);
uint8_t chips_detected = (GLOBAL_STATE->ASIC_functions.init_fn)(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->asic_count);
ESP_LOGI(TAG, "%u chips detected, %u expected", chips_detected, GLOBAL_STATE->asic_count);
int baud = (*GLOBAL_STATE->ASIC_functions.set_max_baud_fn)();
vTaskDelay(10 / portTICK_PERIOD_MS);

1
main/system.c
View File

@ -82,6 +82,7 @@ static void _init_system(GlobalState * global_state, SystemModule * module)
ESP_ERROR_CHECK(i2c_master_init());
ESP_LOGI(TAG, "I2C initialized successfully");
// Initialize the core voltage regulator
VCORE_init(global_state);
VCORE_set_voltage(nvs_config_get_u16(NVS_CONFIG_ASIC_VOLTAGE, CONFIG_ASIC_VOLTAGE) / 1000.0, global_state);

1
main/tasks/power_management_task.c
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@ -34,7 +34,6 @@ static float _fbound(float value, float lower_bound, float upper_bound)
void POWER_MANAGEMENT_task(void * pvParameters)
{
GlobalState * GLOBAL_STATE = (GlobalState *) pvParameters;
PowerManagementModule * power_management = &GLOBAL_STATE->POWER_MANAGEMENT_MODULE;

4
main/vcore.c
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@ -57,7 +57,7 @@ bool VCORE_set_voltage(float core_voltage, GlobalState * global_state)
case DEVICE_MAX:
case DEVICE_ULTRA:
case DEVICE_SUPRA:
reg_setting = ds4432_tps40305_bitaxe_voltage_to_reg(core_voltage);
reg_setting = ds4432_tps40305_bitaxe_voltage_to_reg(core_voltage * global_state->voltage_domain);
ESP_LOGI(TAG, "Set ASIC voltage = %.3fV [0x%02X]", core_voltage, reg_setting);
DS4432U_set_current_code(0, reg_setting); /// eek!
break;
@ -69,5 +69,5 @@ bool VCORE_set_voltage(float core_voltage, GlobalState * global_state)
}
uint16_t VCORE_get_voltage_mv(GlobalState * global_state) {
return ADC_get_vcore();
return ADC_get_vcore() / global_state->voltage_domain;
}

2
readme.md
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@ -50,7 +50,7 @@ The following are recommendations but it is necessary that you do have all value
asicfrequency,data,u16,485
asicvoltage,data,u16,1200
asicmodel,data,string,BM1366
devicemodel,data,string,ultra
asiccount,data,u16,1
boardversion,data,string,0.11
```